[PATCH 02/15] spi: set mode bits for "spi-rx-dtr" and "spi-tx-dtr"

[Pratyush Yadav]

These two DT properties express DTR receive and transmit capabilities of
a SPI flash and controller. Introduce two new mode bits: SPI_RX_DTR and
SPI_TX_DTR which correspond to the new DT properties. Set these bits
when the two corresponding properties are present in the device tree.

Signed-off-by: Pratyush Yadav <p.ya...@ti.com>
---
 drivers/spi/spi-uclass.c | 9 +++++++++
 include/spi.h            | 2 ++
 2 files changed, 11 insertions(+)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 4a02d95a34..74e4b5b3ad 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -435,6 +435,7 @@ int spi_slave_ofdata_to_platdata(struct udevice *dev,
 {
        int mode = 0;
        int value;
+       bool dtr;
 
        plat->cs = dev_read_u32_default(dev, "reg", -1);
        plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency",
@@ -487,6 +488,14 @@ int spi_slave_ofdata_to_platdata(struct udevice *dev,
                break;
        }
 
+       dtr = dev_read_bool(dev, "spi-rx-dtr");
+       if (dtr)
+               mode |= SPI_RX_DTR;
+
+       dtr = dev_read_bool(dev, "spi-tx-dtr");
+       if (dtr)
+               mode |= SPI_TX_DTR;
+
        plat->mode = mode;
 
        return 0;
diff --git a/include/spi.h b/include/spi.h
index 852f570eaa..64558a5145 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -32,6 +32,8 @@
 #define SPI_RX_QUAD    BIT(13)                 /* receive with 4 wires */
 #define SPI_TX_OCTAL   BIT(14)                 /* transmit with 8 wires */
 #define SPI_RX_OCTAL   BIT(15)                 /* receive with 8 wires */
+#define SPI_TX_DTR     BIT(16)                 /* transmit in DTR protocol */
+#define SPI_RX_DTR     BIT(17)                 /* receive in DTR protocol */
 
 /* Header byte that marks the start of the message */
 #define SPI_PREAMBLE_END_BYTE  0xec
-- 
2.25.0