Reduce the delay after BIST delay, from 1ms to 10us
which is enough accoriding datasheet.
Signed-off-by: Patrick Delaunay <patrick.delau...@st.com>
---
drivers/ram/stm32mp1/stm32mp1_tuning.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ram/stm32mp1/stm32mp1_tuning.c
b/drivers/ram/stm32mp1/stm32mp1_tuning.c
index 07d57d496c..3013b7b667 100644
--- a/drivers/ram/stm32mp1/stm32mp1_tuning.c
+++ b/drivers/ram/stm32mp1/stm32mp1_tuning.c
@@ -402,7 +402,7 @@ run:
writel(rand(), &phy->bistlsr);
/* some delay to reset BIST */
- mdelay(1);
+ udelay(10);
/*Perform BIST Run*/
clrsetbits_le32(&phy->bistrr,
--
2.17.1
