Hi Baruch
On 8/3/20 01:42, Baruch Siach wrote:
Hi Walter,
On Wed, Mar 04 2020, Walter Lozano wrote:
In SPL legacy code only one MMC device is created, based on BOOT_CFG
register, which can be either SD or eMMC. In this context
board_boot_order return always MMC1 when configure to boot from
SD/eMMC. After switching to DM both SD and eMMC devices are created
based on the information available on DT, but as board_boot_order
only returns MMC1 is not possible to boot from eMMC.
This patch customizes board_boot_order taking into account BOOT_CFG
register to point to correct MMC1 / MMC2 device.
Signed-off-by: Walter Lozano <[email protected]>
---
board/solidrun/mx6cuboxi/mx6cuboxi.c | 49 ++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 71c77ad2a2..3ce122e8b9 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -649,6 +649,55 @@ int board_fit_config_name_match(const char *name)
return strcmp(name, tmp_name);
}
+void board_boot_order(u32 *spl_boot_list)
+{
+ struct src *psrc = (struct src *)SRC_BASE_ADDR;
+ unsigned int reg = readl(&psrc->sbmr1) >> 11;
+ u32 boot_mode = imx6_src_get_boot_mode() & IMX6_BMODE_MASK;
+ unsigned int bmode = readl(&src_base->sbmr2);
This is duplication of the logicpd/imx6 board code. But..
+
+ /* If bmode is serial or USB phy is active, return serial */
+ if (((bmode >> 24) & 0x03) == 0x01 || is_usbotg_phy_active()) {
+ spl_boot_list[0] = BOOT_DEVICE_BOARD;
+ return;
+ }
+
+ switch (boot_mode >> IMX6_BMODE_SHIFT) {
+ case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
+ spl_boot_list[0] = BOOT_DEVICE_NAND;
+ break;
... we have no raw NAND device on Hummingboard.
Yes, you are right, I use the logicpd/imx6 as reference and forgot about
the NAND. Thanks you pointing at it.
+ case IMX6_BMODE_SD:
+ case IMX6_BMODE_ESD:
+ case IMX6_BMODE_MMC:
+ case IMX6_BMODE_EMMC:
+ /*
+ * Upon reading BOOT_CFG register the following map is done:
+ * Bit 11 and 12 of BOOT_CFG register can determine the current
+ * mmc port
+ * 0x1 SD2
+ * 0x2 SD3
+ */
+
+ reg &= 0x3; /* Only care about bottom 2 bits */
+ switch (reg) {
+ case 1:
+ spl_boot_list[0] = BOOT_DEVICE_MMC1;
+ break;
+ case 2:
+ spl_boot_list[0] = BOOT_DEVICE_MMC2;
+ break;
This code is very similar to setup_iomux_mmc(). Maybe an opportunity to share
code between functions?
Thanks for your suggestion, I will do a little rework.
Thanks,
baruch
Regards,
Walter
