This patchset mainly to covert Arria 10 SDRAM driver to device model
and fixes few bugs in driver. It also added RAM size check function
to check valid RAM.
v1->v2:
- Update Patch[1] commit description
- Change debug() to printf() if failed to probe SDRAM driver in SPL. [Patch 2]
- Change to use MACRO(n) to calculate register address. [Patch 2]
- Call to reset_assert_bulk() if failed in _probe(). [Patch 3]
- Change SZ_1G to full SDRAM size in get_ram_size() argument. [Patch 5]
- Patch 4, 6 and 7 unchanged.
Ley Foon Tan (7):
ddr: altera: arria10: Fix incorrect address for mpu1
ddr: altera: arria10: Move SDRAM driver to DM
ddr: altera: arria10: Change to use reset DM function
arm: socfpga: arria10: Move sdram_arria10.h to drivers/ddr/altera
ddr: altera: arria10: Add RAM size check
ddr: altera: arria10: Change %i to %u for printf
ddr: altera: arria10: Remove call to dram_init_banksize()
arch/arm/dts/socfpga_arria10-u-boot.dtsi | 8 +
.../include/mach/reset_manager_arria10.h | 1 -
arch/arm/mach-socfpga/include/mach/sdram.h | 2 +-
arch/arm/mach-socfpga/misc_arria10.c | 2 +-
arch/arm/mach-socfpga/reset_manager_arria10.c | 7 -
arch/arm/mach-socfpga/spl_a10.c | 14 +-
drivers/ddr/altera/Kconfig | 4 +-
drivers/ddr/altera/sdram_arria10.c | 382 ++++++++++--------
.../ddr/altera}/sdram_arria10.h | 225 ++---------
9 files changed, 285 insertions(+), 360 deletions(-)
rename {arch/arm/mach-socfpga/include/mach =>
drivers/ddr/altera}/sdram_arria10.h (72%)
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2.19.0
