LCDIF clock gate was wrong so set it according to RM.

Signed-off-by: Giulio Benetti <giulio.bene...@benettiengineering.com>
---
 drivers/clk/imx/clk-imxrt1050.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
index 329f4580c5..8279e784fe 100644
--- a/drivers/clk/imx/clk-imxrt1050.c
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -255,7 +255,7 @@ static int imxrt1050_clk_probe(struct udevice *dev)
        clk_dm(IMXRT1050_CLK_SEMC,
               imx_clk_gate2("semc", "semc_podf", base + 0x74, 4));
        clk_dm(IMXRT1050_CLK_LCDIF,
-              imx_clk_gate2("lcdif", "lcdif_podf", base + 0x70, 28));
+              imx_clk_gate2("lcdif", "lcdif_podf", base + 0x74, 10));
 
        struct clk *clk, *clk1;
 
-- 
2.20.1

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