Add PCI Express capability definitions required by the Broadcom STB PCIe controller driver.
Signed-off-by: Sylwester Nawrocki <s.nawro...@samsung.com> Reviewed-by: Bin Meng <bmeng...@gmail.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulie...@suse.de> --- Changes since v1: - none. Changes since RFC: - ensure the entries are added in order, sorted by ascending address values. --- include/pci.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/pci.h b/include/pci.h index dfdbb32..66676c0 100644 --- a/include/pci.h +++ b/include/pci.h @@ -479,11 +479,17 @@ #define PCI_EXP_DEVCTL 8 /* Device Control */ #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ #define PCI_EXP_LNKCAP 12 /* Link Capabilities */ +#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ +#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ #define PCI_EXP_LNKSTA 18 /* Link Status */ +#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ +#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ +#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ #define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ #define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ +#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ /* Include the ID list */ -- 2.7.4
