>-----Original Message----- >From: Jagan Teki <[email protected]> >Sent: 10 May 2020 20:44 >To: Pragnesh Patel <[email protected]> >Cc: U-Boot-Denx <[email protected]>; Atish Patra ><[email protected]>; Palmer Dabbelt <[email protected]>; Bin >Meng <[email protected]>; Paul Walmsley <[email protected]>; >Troy Benjegerdes <[email protected]>; Anup Patel ><[email protected]>; Sagar Kadam <[email protected]>; Rick Chen ><[email protected]> >Subject: Re: [PATCH v8 19/21] sifive: dts: fu540: Enable L2 Cache in U-Boot > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >On Sat, May 9, 2020 at 8:02 PM Pragnesh Patel <[email protected]> >wrote: >> >> Add L2 cache node to enable cache ways from U-Boot >> >> Signed-off-by: Pragnesh Patel <[email protected]> >> Reviewed-by: Bin Meng <[email protected]> >> --- >> arch/riscv/dts/fu540-c000-u-boot.dtsi | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi b/arch/riscv/dts/fu540- >c000-u-boot.dtsi >> index fc91a7c987..42e43522ed 100644 >> --- a/arch/riscv/dts/fu540-c000-u-boot.dtsi >> +++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi >> @@ -82,3 +82,7 @@ >> &qspi2 { >> u-boot,dm-spl; >> }; >> + >> +&l2cache { >> + status = "okay"; >> +}; > >Squash with next commit.
Will update in v9.
