Hi Bin, On Tue, 26 May 2020 at 04:08, Bin Meng <bmeng...@gmail.com> wrote: > > Hi Simon, > > On Mon, May 18, 2020 at 11:01 AM Simon Glass <s...@chromium.org> wrote: > > > > At present this logic does not work on link and samus, since their SPI > > controller is not a PCI device, but a child of the PCH. > > > > Unfortunately, fixing this involves a lot of extra logic. Still, this was > > requested in the review of the fix-up patch, so here it is. > > This patch still does not fix the issue completely. > > In mrccache_get_region() the call to > uclass_find_first_device(UCLASS_SPI_FLASH, &dev) finds nothing. The > commit changed the behavior is this one: > > commit 87f1084a630e6dbd5ba9a9747ce185d98ed40658 > Author: Simon Glass <s...@chromium.org> > Date: Fri Dec 6 21:42:03 2019 -0700 > > x86: Adjust mrccache_get_region() to use livetree > > Change the algorithm to first find the flash device then read the > properties using the livetree API. With this change the device is not > probed so this needs to be done in mrccache_save(). > > Previously fdtdec APIs are used to get the MRC cache range, but now > since it switches to live tree, a dev node has to be passed hence the > call to uclass_find_first_device(UCLASS_SPI_FLASH, &dev) but at this > point nothing is probed.
OK I see. I didn't notice that due to SPI-flash problems on minnowmax. I sent a patch for that as well. Have sent a v2 series with an additional patch to restore the old behaviour. Regards, Simon