On 6/9/20 10:53 AM, Hayes Wang wrote:
> This is used to support RTL8153B and RTL8154B.

[...]

> +             ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
> +                            ocp_data);
> +             break;
> +
> +     case RTL_VER_08:
> +     case RTL_VER_09:
> +             /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
> +              * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 1264ns.
> +              */
> +             ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
> +                            1264 / 8);

Can you add some macro for this 1264 magic value ?

> +             ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
> +                            ocp_data);
> +             break;
> +
> +     default:
> +             debug("** %s Invalid Device\n", __func__);
> +             break;
> +     }
>  }

[...]

> +static void r8153b_hw_phy_cfg(struct r8152 *tp)
> +{
> +     u32 ocp_data;
> +     u16 data;
> +
> +     data = r8152_mdio_read(tp, MII_BMCR);
> +     if (data & BMCR_PDOWN) {
> +             data &= ~BMCR_PDOWN;
> +             r8152_mdio_write(tp, MII_BMCR, data);
> +     }
> +
> +     /* U1/U2/L1 idle timer. 500 us */
> +     ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500);
> +
> +     r8153b_firmware(tp);
> +
> +     data = sram_read(tp, SRAM_GREEN_CFG);
> +     data |= R_TUNE_EN;
> +     sram_write(tp, SRAM_GREEN_CFG, data);
> +     data = ocp_reg_read(tp, OCP_NCTL_CFG);
> +     data |= PGA_RETURN_EN;
> +     ocp_reg_write(tp, OCP_NCTL_CFG, data);
> +
> +     /* ADC Bias Calibration:
> +      * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
> +      * bit (bit3) to rebuild the real 16-bit data. Write the data to the
> +      * ADC ioffset.
> +      */
> +     ocp_data = r8152_efuse_read(tp, 0x7d);
> +     data = (u16)(((ocp_data & 0x1fff0) >> 1) | (ocp_data & 0x7));

Are these type casts really needed ?

[...]

>  static void rtl_clear_bp(struct r8152 *tp, u16 type)
>  {
>       switch (tp->version) {
> @@ -742,7 +863,23 @@ static void rtl_clear_bp(struct r8152 *tp, u16 type)
>       case RTL_VER_06:
>               ocp_write_byte(tp, type, PLA_BP_EN, 0);
>               break;
> +     case RTL_VER_08:
> +     case RTL_VER_09:
>       default:
> +             if (type == MCU_TYPE_USB) {
> +                     ocp_write_byte(tp, MCU_TYPE_USB, USB_BP2_EN, 0);
> +
> +                     ocp_write_word(tp, MCU_TYPE_USB, USB_BP_8, 0);
> +                     ocp_write_word(tp, MCU_TYPE_USB, USB_BP_9, 0);
> +                     ocp_write_word(tp, MCU_TYPE_USB, USB_BP_10, 0);
> +                     ocp_write_word(tp, MCU_TYPE_USB, USB_BP_11, 0);
> +                     ocp_write_word(tp, MCU_TYPE_USB, USB_BP_12, 0);
> +                     ocp_write_word(tp, MCU_TYPE_USB, USB_BP_13, 0);
> +                     ocp_write_word(tp, MCU_TYPE_USB, USB_BP_14, 0);
> +                     ocp_write_word(tp, MCU_TYPE_USB, USB_BP_15, 0);

Can those registers be written in bulk ?

> +             } else {
> +                     ocp_write_byte(tp, MCU_TYPE_PLA, PLA_BP_EN, 0);
> +             }
>               break;
>       }
>  
> @@ -1027,3 +1164,42 @@ void r8153_firmware(struct r8152 *tp)
>               ocp_write_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1, ocp_data);
>       }
>  }
> +
> +void r8153b_firmware(struct r8152 *tp)
> +{
> +     int i;
> +
> +     if (tp->version == RTL_VER_09) {

Invert the condition and reduce indent.

if (tp->version != RTL_VER_09)
 return;

...
> +             u32 ocp_data;
> +
> +             rtl_clear_bp(tp, MCU_TYPE_USB);

[...]

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