Hi Bin,
On 17.07.20 12:09, Bin Meng wrote:
Hi Stefan,
On Fri, Jul 17, 2020 at 6:04 PM Stefan Roese <[email protected]> wrote:
On 17.07.20 07:24, Bin Meng wrote:
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese <[email protected]> wrote:
xhci_writeq() makes the CPU->LE swapping only when addressing registers
in the xHCI controller address range and not in the local memory (RAM).
Is the above behavior exposed by the MIPS platform's writel()?
Not sure what you mean with this. Without this patch, xhci_writeq()
will not swap on Octeon MIPS, as the destination address is located
in local memory (DDR).
I wonder why xhci_writeq() does not swap? Is this due to the writel()
implementation on Octeon MIPS?
Ah, okay. Please see my comment below for this. Here again:
BTW: The Octeon MIPS writel will swap to little-endian, when the
location is in the xHCI controller address space (and PCI etc). This
support for selective swapping is not pushed into mainline yet. I
will send it in some follow up patches.
So to answer your question: writel will not swap when addressing
local memory.
Using the xhci_read/write accessor functions
should be restricted to accessing the controller registers.
Yes, this is the supposed usage that xhci_read/write should be called
to operate on xHCI registers. However my question was why
xhci_read/write does not swap even it is called on memory space, hence
the writel() question.
BTW: The Octeon MIPS writel will swap to little-endian, when the
location is in the xHCI controller address space (and PCI etc). This
support for selective swapping is not pushed into mainline yet. I
will send it in some follow up patches.
Regards,
Bin
Thanks,
Stefan
