>-----Original Message----- >From: Bin Meng <[email protected]> >Sent: 20 July 2020 11:37 >To: Rick Chen <[email protected]>; Pragnesh Patel ><[email protected]>; Sagar Kadam <[email protected]>; U- >Boot Mailing List <[email protected]> >Cc: Bin Meng <[email protected]> >Subject: [PATCH v2 1/2] riscv: dts: hifive-unleashed-a00: Make memory node >available to SPL > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >From: Bin Meng <[email protected]> > >Make memory node available to SPL in prepration to updates to SiFive DDR >RAM driver to read memory information from DT. > >Signed-off-by: Bin Meng <[email protected]> >--- > >Changes in v2: >- rebase on top of u-boot-riscv/master > > arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) >
Reviewed-by: Pragnesh Patel <[email protected]>
