Hi Stefan, On Fri, 24 Jul 2020 at 04:09, Stefan Roese <[email protected]> wrote: > > From: Suneel Garapati <[email protected]> > > Enable PCI memory regions in ranges property to be of multiple entry. > This helps to add support for SoC's like OcteonTX/TX2 where every > peripheral is on PCI bus. > > Signed-off-by: Suneel Garapati <[email protected]> > Cc: Simon Glass <[email protected]> > Cc: Bin Meng <[email protected]> > > Signed-off-by: Stefan Roese <[email protected]> > --- > > Changes in v1: > - Change patch subject > - Enhance Kconfig help descrition > - Use if() instead of #if > > drivers/pci/Kconfig | 10 ++++++++++ > drivers/pci/pci-uclass.c | 9 ++++++--- > 2 files changed, 16 insertions(+), 3 deletions(-)
This needs an update to a sandbox test to handle this behaviour.
