> -----Original Message-----
> From: Ang, Chee Hong <[email protected]>
> Sent: Wednesday, August 5, 2020 6:35 PM
> To: [email protected]
> Cc: Marek Vasut <[email protected]>; Simon Goldschmidt
> <[email protected]>; Tom Rini <[email protected]>; See,
> Chin Liang <[email protected]>; Tan, Ley Foon
> <[email protected]>; Ang, Chee Hong <[email protected]>;
> Chee, Tien Fong <[email protected]>; Lim, Elly Siew Chin
> <[email protected]>
> Subject: [PATCH v1] configs: socfpga: soc64: Avoid SPL enter infinite loop
> during exception
>
> From: Chin Liang See <[email protected]>
>
> In current implementation, any exception would trigger a CPU reset.
> But a bad written SPL would cause infinite loop where the system will reload
> the same SPL instead of loading factory safe image.
>
> Hence this patch is to ensure any exception will cause a hang. At this
> moment, watchdog shall be triggered and Remote System Update
> mechanism shall load the next production image or factory safe image.
>
> Signed-off-by: Chin Liang See <[email protected]>
> Signed-off-by: Chee Hong Ang <[email protected]>
> ---
> configs/socfpga_agilex_defconfig | 1 +
> configs/socfpga_stratix10_defconfig | 1 +
> 2 files changed, 2 insertions(+)
>
Reviewed-by: Ley Foon Tan <[email protected]>
Regards
Ley Foon
