This reverts commit c5f4b805755912a3d2fe20f014b6b6ab0473bd73.
Conflicts:
arch/arm/mach-socfpga/misc_gen5.c
Without socfpga_sdram_apply_static_cfg(), the system hangs when Linux
calls altvipfb2_start_hw() of the Intel Video and Image Processing(VIP)
Frame Buffer II driver (drivers/video/fbdev/altvipfb2.c), but only
after a power cycle (cold boot). The issue does not show up after a
soft reset (warm boot) and with v2018.11.
Signed-off-by: Wolfgang Grandegger <w...@aries-embedded.de>
CC: Marek Vasut <ma...@denx.de>
CC: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>
---
arch/arm/mach-socfpga/misc_gen5.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/mach-socfpga/misc_gen5.c
b/arch/arm/mach-socfpga/misc_gen5.c
index 7209e8d..c1ecd92 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -216,6 +216,35 @@ int arch_early_init_r(void)
static struct socfpga_sdr_ctrl *sdr_ctrl =
(struct socfpga_sdr_ctrl *)SDR_CTRLGRP_ADDRESS;
+static void socfpga_sdram_apply_static_cfg(void)
+{
+ const u32 applymask = 0x8;
+ u32 val = readl(&sdr_ctrl->static_cfg) | applymask;
+
+ /*
+ * SDRAM staticcfg register specific:
+ * When applying the register setting, the CPU must not access
+ * SDRAM. Luckily for us, we can abuse i-cache here to help us
+ * circumvent the SDRAM access issue. The idea is to make sure
+ * that the code is in one full i-cache line by branching past
+ * it and back. Once it is in the i-cache, we execute the core
+ * of the code and apply the register settings.
+ *
+ * The code below uses 7 instructions, while the Cortex-A9 has
+ * 32-byte cachelines, thus the limit is 8 instructions total.
+ */
+ asm volatile(
+ ".align 5 \n"
+ " b 2f \n"
+ "1: str %0, [%1] \n"
+ " dsb \n"
+ " isb \n"
+ " b 3f \n"
+ "2: b 1b \n"
+ "3: nop \n"
+ : : "r"(val), "r"(&sdr_ctrl->static_cfg) : "memory", "cc");
+}
+
void do_bridge_reset(int enable, unsigned int mask)
{
int i;
@@ -233,6 +262,7 @@ void do_bridge_reset(int enable, unsigned int mask)
writel(iswgrp_handoff[2],
socfpga_get_sysmgr_addr() +
SYSMGR_GEN5_FPGAINFGRP_MODULE);
+ socfpga_sdram_apply_static_cfg();
writel(iswgrp_handoff[3], &sdr_ctrl->fpgaport_rst);
writel(iswgrp_handoff[0],
socfpga_get_rstmgr_addr() + RSTMGR_GEN5_BRGMODRST);
@@ -245,6 +275,7 @@ void do_bridge_reset(int enable, unsigned int mask)
writel(0, socfpga_get_sysmgr_addr() +
SYSMGR_GEN5_FPGAINFGRP_MODULE);
writel(0, &sdr_ctrl->fpgaport_rst);
+ socfpga_sdram_apply_static_cfg();
writel(0x7, socfpga_get_rstmgr_addr() + RSTMGR_GEN5_BRGMODRST);
writel(1, &nic301_regs->remap);
}
--
1.9.1
