On 9/17/20 5:30 AM, Jack Mitchell wrote: > The timeout calculation is based on the clk being in KHz but > the clk api returns the clk value in Hz. Convert this to KHz > to calculate the correct timeout value. > > Signed-off-by: Jack Mitchell <m...@embed.me.uk> > --- > drivers/watchdog/designware_wdt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/watchdog/designware_wdt.c > b/drivers/watchdog/designware_wdt.c > index 12f09a7a39..7caa6c550c 100644 > --- a/drivers/watchdog/designware_wdt.c > +++ b/drivers/watchdog/designware_wdt.c > @@ -130,7 +130,7 @@ static int designware_wdt_probe(struct udevice *dev) > if (ret) > return ret; > > - priv->clk_khz = clk_get_rate(&clk); > + priv->clk_khz = clk_get_rate(&clk) / 1000; > if (!priv->clk_khz) > return -EINVAL; > #else >
Hi, Thanks for submitting this. I believe it is a duplicate of [1]. --Sean [1] https://patchwork.ozlabs.org/project/uboot/patch/20200909210420.243190-4-sean...@gmail.com/