[PATCH 2/5] pwm: sunxi: v3s: Enable PWM0

[Martin Cerveny]

Enable PWM0 for V3S (for backlight LCD support).

Signed-off-by: Martin Cerveny <m.cerv...@computer.org>
---
 arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
 drivers/pwm/sunxi_pwm.c                | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h 
b/arch/arm/include/asm/arch-sunxi/gpio.h
index a646ea6a3c..d83dfdf605 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -164,6 +164,7 @@ enum sunxi_gpio_number {
 #define SUN8I_A33_GPB_UART0    3
 #define SUN8I_A83T_GPB_UART0   2
 #define SUN8I_V3S_GPB_UART0    3
+#define SUN8I_V3S_GPB_PWM0     2
 #define SUN50I_GPB_UART0       4
 
 #define SUNXI_GPC_NAND         2
diff --git a/drivers/pwm/sunxi_pwm.c b/drivers/pwm/sunxi_pwm.c
index e2ae1a8009..136e7c63d3 100644
--- a/drivers/pwm/sunxi_pwm.c
+++ b/drivers/pwm/sunxi_pwm.c
@@ -48,6 +48,8 @@ static int sunxi_pwm_config_pinmux(void)
 {
 #ifdef CONFIG_MACH_SUN50I
        sunxi_gpio_set_cfgpin(SUNXI_GPD(22), SUNXI_GPD_PWM);
+#elif defined CONFIG_MACH_SUN8I_V3S
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(4), SUN8I_V3S_GPB_PWM0);
 #endif
        return 0;
 }
@@ -171,6 +173,7 @@ static const struct pwm_ops sunxi_pwm_ops = {
 static const struct udevice_id sunxi_pwm_ids[] = {
        { .compatible = "allwinner,sun5i-a13-pwm" },
        { .compatible = "allwinner,sun50i-a64-pwm" },
+       { .compatible = "allwinner,sun7i-a20-pwm" },
        { }
 };
 
-- 
2.17.1