Restructure Stratix10 and Agilex handoff code to used by
all SOC64 devices, in preparation to support handoff for
Diamond Mesa.
Remove wrap_pinmux_config_s10.c. Add wrap_handoff_soc64.c
which contains the generic function to parse the handoff
data.
Update system_manager_soc64.c to use generic handoff
function in wrap_handoff_soc64.c.
Signed-off-by: Siew Chin Lim <elly.siew.chin....@intel.com>
---
arch/arm/mach-socfpga/Makefile | 4 +-
arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 21 +++++++
.../include/mach/system_manager_soc64.h | 4 --
arch/arm/mach-socfpga/system_manager_soc64.c | 53 ++++++++++------
arch/arm/mach-socfpga/wrap_handoff_soc64.c | 73 ++++++++++++++++++++++
arch/arm/mach-socfpga/wrap_pinmux_config_s10.c | 56 -----------------
6 files changed, 131 insertions(+), 80 deletions(-)
create mode 100644 arch/arm/mach-socfpga/wrap_handoff_soc64.c
delete mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index ff82a64d18..96fef50a12 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -37,7 +37,7 @@ obj-y += mmu-arm64_s10.o
obj-y += reset_manager_s10.o
obj-y += system_manager_soc64.o
obj-y += timer_s10.o
-obj-y += wrap_pinmux_config_s10.o
+obj-y += wrap_handoff_soc64.o
obj-y += wrap_pll_config_soc64.o
endif
@@ -50,7 +50,7 @@ obj-y += mmu-arm64_s10.o
obj-y += reset_manager_s10.o
obj-y += system_manager_soc64.o
obj-y += timer_s10.o
-obj-y += wrap_pinmux_config_s10.o
+obj-y += wrap_handoff_soc64.o
obj-y += wrap_pll_config_soc64.o
endif
diff --git a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
index dbd19f602c..68e0278384 100644
--- a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
@@ -11,6 +11,7 @@
* Offset for HW handoff from Quartus tools
*/
/* HPS handoff */
+#define SOC64_HANDOFF_MAGIC_BOOT 0x424F4F54
#define SOC64_HANDOFF_MAGIC_MUX 0x504D5558
#define SOC64_HANDOFF_MAGIC_IOCTL 0x494F4354
#define SOC64_HANDOFF_MAGIC_FPGA 0x46504741
@@ -38,4 +39,24 @@
#define SOC64_HANDOFF_CLOCK_FPGA (SOC64_HANDOFF_BASE + 0x600)
#endif
+#define SOC64_HANDOFF_MUX_LEN 96
+#define SOC64_HANDOFF_IOCTL_LEN 96
+#ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
+#define SOC64_HANDOFF_FPGA_LEN 42
+#else
+#define SOC64_HANDOFF_FPGA_LEN 40
+#endif
+#define SOC64_HANDOFF_DELAY_LEN 96
+
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+enum endianness {
+ little_endian,
+ big_endian
+};
+
+int socfpga_get_handoff_size(void *handoff_address, enum endianness endian);
+int socfpga_handoff_read(void *handoff_address, void *table, u32 table_len,
+ enum endianness big_endian);
+#endif
#endif /* _HANDOFF_SOC64_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
index e5bb81a7a2..e54ea3b012 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
@@ -10,10 +10,6 @@
void sysmgr_pinmux_init(void);
void populate_sysmgr_fpgaintf_module(void);
void populate_sysmgr_pinmux(void);
-void sysmgr_pinmux_table_sel(const u32 **table, unsigned int *table_len);
-void sysmgr_pinmux_table_ctrl(const u32 **table, unsigned int *table_len);
-void sysmgr_pinmux_table_fpga(const u32 **table, unsigned int *table_len);
-void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len);
#define SYSMGR_SOC64_WDDBG 0x08
#define SYSMGR_SOC64_DMA 0x20
diff --git a/arch/arm/mach-socfpga/system_manager_soc64.c
b/arch/arm/mach-socfpga/system_manager_soc64.c
index cdda881efd..f94bf5ecd6 100644
--- a/arch/arm/mach-socfpga/system_manager_soc64.c
+++ b/arch/arm/mach-socfpga/system_manager_soc64.c
@@ -1,12 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
+ * Copyright (C) 2016-2020 Intel Corporation <www.intel.com>
*
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/system_manager.h>
+#include <asm/arch/handoff_soc64.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -63,39 +64,55 @@ void populate_sysmgr_fpgaintf_module(void)
*/
void populate_sysmgr_pinmux(void)
{
- const u32 *sys_mgr_table_u32;
- unsigned int len, i;
+ u32 len, i;
+ u32 len_mux = socfpga_get_handoff_size((void *)SOC64_HANDOFF_MUX,
big_endian);
+ u32 len_ioctl = socfpga_get_handoff_size((void *)SOC64_HANDOFF_IOCTL,
big_endian);
+ u32 len_fpga = socfpga_get_handoff_size((void *)SOC64_HANDOFF_FPGA,
big_endian);
+ u32 len_delay = socfpga_get_handoff_size((void *)SOC64_HANDOFF_DELAY,
big_endian);
+
+ len = (len_mux > len_ioctl) ? len_mux : len_ioctl;
+ len = (len > len_fpga) ? len : len_fpga;
+ len = (len > len_delay) ? len : len_delay;
+
+ u32 handoff_table[len];
/* setup the pin sel */
- sysmgr_pinmux_table_sel(&sys_mgr_table_u32, &len);
+ len = (len_mux < SOC64_HANDOFF_MUX_LEN) ? len_mux :
SOC64_HANDOFF_MUX_LEN;
+ socfpga_handoff_read((void *)SOC64_HANDOFF_MUX, handoff_table, len,
big_endian);
for (i = 0; i < len; i = i + 2) {
- writel(sys_mgr_table_u32[i + 1],
- sys_mgr_table_u32[i] +
- (u8 *)socfpga_get_sysmgr_addr() + SYSMGR_SOC64_PINSEL0);
+ writel(handoff_table[i + 1],
+ handoff_table[i] +
+ (u8 *)socfpga_get_sysmgr_addr() +
+ SYSMGR_SOC64_PINSEL0);
}
/* setup the pin ctrl */
- sysmgr_pinmux_table_ctrl(&sys_mgr_table_u32, &len);
+ len = (len_ioctl < SOC64_HANDOFF_IOCTL_LEN) ? len_ioctl :
SOC64_HANDOFF_IOCTL_LEN;
+ socfpga_handoff_read((void *)SOC64_HANDOFF_IOCTL, handoff_table, len,
big_endian);
for (i = 0; i < len; i = i + 2) {
- writel(sys_mgr_table_u32[i + 1],
- sys_mgr_table_u32[i] +
- (u8 *)socfpga_get_sysmgr_addr() + SYSMGR_SOC64_IOCTRL0);
+ writel(handoff_table[i + 1],
+ handoff_table[i] +
+ (u8 *)socfpga_get_sysmgr_addr() +
+ SYSMGR_SOC64_IOCTRL0);
}
/* setup the fpga use */
- sysmgr_pinmux_table_fpga(&sys_mgr_table_u32, &len);
+ len = (len_fpga < SOC64_HANDOFF_FPGA_LEN) ? len_fpga :
SOC64_HANDOFF_FPGA_LEN;
+ socfpga_handoff_read((void *)SOC64_HANDOFF_FPGA, handoff_table, len,
big_endian);
for (i = 0; i < len; i = i + 2) {
- writel(sys_mgr_table_u32[i + 1],
- sys_mgr_table_u32[i] +
+ writel(handoff_table[i + 1],
+ handoff_table[i] +
(u8 *)socfpga_get_sysmgr_addr() +
SYSMGR_SOC64_EMAC0_USEFPGA);
}
/* setup the IO delay */
- sysmgr_pinmux_table_delay(&sys_mgr_table_u32, &len);
+ len = (len_delay < SOC64_HANDOFF_DELAY_LEN) ? len_delay :
SOC64_HANDOFF_DELAY_LEN;
+ socfpga_handoff_read((void *)SOC64_HANDOFF_DELAY, handoff_table, len,
big_endian);
for (i = 0; i < len; i = i + 2) {
- writel(sys_mgr_table_u32[i + 1],
- sys_mgr_table_u32[i] +
- (u8 *)socfpga_get_sysmgr_addr() + SYSMGR_SOC64_IODELAY0);
+ writel(handoff_table[i + 1],
+ handoff_table[i] +
+ (u8 *)socfpga_get_sysmgr_addr() +
+ SYSMGR_SOC64_IODELAY0);
}
}
diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
new file mode 100644
index 0000000000..672bdd5230
--- /dev/null
+++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Intel Corporation <www.intel.com>
+ *
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <asm/arch/handoff_soc64.h>
+#include "log.h"
+
+int socfpga_get_handoff_size(void *handoff_address, enum endianness endian)
+{
+ u32 handoff_size;
+
+ if (endian == little_endian) {
+ handoff_size = (readl(handoff_address +
SOC64_HANDOFF_OFFSET_LENGTH) -
+ SOC64_HANDOFF_OFFSET_DATA) /
+ sizeof(u32);
+ } else if (endian == big_endian) {
+ handoff_size = swab32(readl(handoff_address +
+ SOC64_HANDOFF_OFFSET_LENGTH));
+ handoff_size = (handoff_size - SOC64_HANDOFF_OFFSET_DATA) /
+ sizeof(u32);
+ } else {
+ return -EINVAL;
+ }
+
+ debug("%s: handoff address = 0x%p handoff size = 0x%08x\n", __func__,
+ (u32 *)handoff_address, handoff_size);
+
+ return handoff_size;
+}
+
+int socfpga_handoff_read(void *handoff_address, void *table, u32 table_len,
+ enum endianness big_endian)
+{
+ u32 temp, i;
+ u32 *table_x32 = table;
+
+ debug("%s: handoff addr = 0x%p ", __func__, (u32 *)handoff_address);
+
+ if (big_endian) {
+ if (swab32(readl(SOC64_HANDOFF_BASE)) ==
SOC64_HANDOFF_MAGIC_BOOT) {
+ debug("Handoff table address = 0x%p ", table_x32);
+ debug("table length = 0x%x\n", table_len);
+ debug("%s: handoff data =\n{\n", __func__);
+
+ for (i = 0; i < table_len; i++) {
+ temp = readl(handoff_address +
+ SOC64_HANDOFF_OFFSET_DATA +
+ (i * sizeof(u32)));
+ *table_x32 = swab32(temp);
+
+ if (!(i % 2))
+ debug(" No.%d Addr 0x%08x: ", i,
+ *table_x32);
+ else
+ debug(" 0x%08x\n", *table_x32);
+
+ table_x32++;
+ }
+ debug("\n}\n");
+ } else {
+ debug("%s: Cannot find SOC64_HANDOFF_MAGIC_BOOT ",
__func__);
+ debug("at addr 0x%p\n", (u32 *)handoff_address);
+ return -EPERM;
+ }
+ }
+
+ return 0;
+}
diff --git a/arch/arm/mach-socfpga/wrap_pinmux_config_s10.c
b/arch/arm/mach-socfpga/wrap_pinmux_config_s10.c
deleted file mode 100644
index d10fb5e454..0000000000
--- a/arch/arm/mach-socfpga/wrap_pinmux_config_s10.c
+++ /dev/null
@@ -1,56 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
- *
- */
-
-#include <common.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <asm/arch/handoff_soc64.h>
-
-static void sysmgr_pinmux_handoff_read(void *handoff_address,
- const u32 **table,
- unsigned int *table_len)
-{
- unsigned int handoff_entry = (swab32(readl(handoff_address +
- SOC64_HANDOFF_OFFSET_LENGTH)) -
- SOC64_HANDOFF_OFFSET_DATA) /
- sizeof(unsigned int);
- unsigned int handoff_chunk[handoff_entry], temp, i;
-
- if (swab32(readl(SOC64_HANDOFF_MUX)) == SOC64_HANDOFF_MAGIC_MUX) {
- /* using handoff from Quartus tools if exists */
- for (i = 0; i < handoff_entry; i++) {
- temp = readl(handoff_address +
- SOC64_HANDOFF_OFFSET_DATA + (i * 4));
- handoff_chunk[i] = swab32(temp);
- }
- *table = handoff_chunk;
- *table_len = ARRAY_SIZE(handoff_chunk);
- }
-}
-
-void sysmgr_pinmux_table_sel(const u32 **table, unsigned int *table_len)
-{
- sysmgr_pinmux_handoff_read((void *)SOC64_HANDOFF_MUX, table,
- table_len);
-}
-
-void sysmgr_pinmux_table_ctrl(const u32 **table, unsigned int *table_len)
-{
- sysmgr_pinmux_handoff_read((void *)SOC64_HANDOFF_IOCTL, table,
- table_len);
-}
-
-void sysmgr_pinmux_table_fpga(const u32 **table, unsigned int *table_len)
-{
- sysmgr_pinmux_handoff_read((void *)SOC64_HANDOFF_FPGA, table,
- table_len);
-}
-
-void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len)
-{
- sysmgr_pinmux_handoff_read((void *)SOC64_HANDOFF_DELAY, table,
- table_len);
-}
--
2.13.0
