út 8. 9. 2020 v 12:10 odesílatel Michal Simek <[email protected]> napsal: > > From: Harini Katakam <[email protected]> > > Add MSCC header with delay definitions for VSC8531 and associated > family devices. > > Signed-off-by: Harini Katakam <[email protected]> > Signed-off-by: Michal Simek <[email protected]> > --- > > Copy from Linux but with fixed intendation and SPDX header. > --- > include/dt-bindings/net/mscc-phy-vsc8531.h | 40 ++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > create mode 100644 include/dt-bindings/net/mscc-phy-vsc8531.h > > diff --git a/include/dt-bindings/net/mscc-phy-vsc8531.h > b/include/dt-bindings/net/mscc-phy-vsc8531.h > new file mode 100644 > index 000000000000..61f5287d7523 > --- /dev/null > +++ b/include/dt-bindings/net/mscc-phy-vsc8531.h > @@ -0,0 +1,40 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ > +/* > + * Device Tree constants for Microsemi VSC8531 PHY > + * > + * Author: Nagaraju Lakkaraju > + * > + * Copyright (c) 2017 Microsemi Corporation > + */ > + > +#ifndef _DT_BINDINGS_MSCC_VSC8531_H > +#define _DT_BINDINGS_MSCC_VSC8531_H > + > +/* PHY LED Modes */ > +#define VSC8531_LINK_ACTIVITY 0 > +#define VSC8531_LINK_1000_ACTIVITY 1 > +#define VSC8531_LINK_100_ACTIVITY 2 > +#define VSC8531_LINK_10_ACTIVITY 3 > +#define VSC8531_LINK_100_1000_ACTIVITY 4 > +#define VSC8531_LINK_10_1000_ACTIVITY 5 > +#define VSC8531_LINK_10_100_ACTIVITY 6 > +#define VSC8584_LINK_100FX_1000X_ACTIVITY 7 > +#define VSC8531_DUPLEX_COLLISION 8 > +#define VSC8531_COLLISION 9 > +#define VSC8531_ACTIVITY 10 > +#define VSC8584_100FX_1000X_ACTIVITY 11 > +#define VSC8531_AUTONEG_FAULT 12 > +#define VSC8531_SERIAL_MODE 13 > +#define VSC8531_FORCE_LED_OFF 14 > +#define VSC8531_FORCE_LED_ON 15 > + > +#define VSC8531_RGMII_CLK_DELAY_0_2_NS 0 > +#define VSC8531_RGMII_CLK_DELAY_0_8_NS 1 > +#define VSC8531_RGMII_CLK_DELAY_1_1_NS 2 > +#define VSC8531_RGMII_CLK_DELAY_1_7_NS 3 > +#define VSC8531_RGMII_CLK_DELAY_2_0_NS 4 > +#define VSC8531_RGMII_CLK_DELAY_2_3_NS 5 > +#define VSC8531_RGMII_CLK_DELAY_2_6_NS 6 > +#define VSC8531_RGMII_CLK_DELAY_3_4_NS 7 > + > +#endif > -- > 2.28.0 >
Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
