On Wed, Sep 30, 2020 at 02:52:43PM +0800, [email protected] wrote: > Hi Tom, > > This PR is for -next > > Please pull some riscv updates: > > - Disable CMD_IRQ for RISC-V. > - Update sipeed/maix doc > - Obtain reg of SiFive RAM via dev_read_addr_index() instead of regmap API. > - Cleans up RISC-V timer drivers and converts them to DM. > - Correctly handle IPIs already pending upon prior stage bootloader (on the > K210) > > Thanks > Rick > > https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/731148651 > > The following changes since commit 0ac83d080a0044cd0d8f782ba12f02cf969d3004: > > Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 > into next (2020-09-25 09:04:01 -0400) > > are available in the Git repository at: > > [email protected]:u-boot/custodians/u-boot-riscv.git > > for you to fetch changes up to 924de3216e9efdf1cdc71b8632099213aac03f2c: > > riscv: Add some comments to start.S (2020-09-30 08:54:52 +0800) >
Applied to u-boot/next, thanks! -- Tom
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