On 18.10.20 21:43, Marek Behun wrote:
On Sun, 18 Oct 2020 17:11:11 +0300
Baruch Siach <bar...@tkos.co.il> wrote:

From: Grzegorz Jaszczyk <j...@semihalf.com>

Replace all comphy initialization with appropriate smc calls. It will
result with triggering synchronous exception that is handled by Secure
Monitor code in EL3. Then the Secure Monitor code will dispatch each smc
call (by parsing the smc function identifier) and triggers appropriate
comphy initialization.

This patch reworks serdes handling for: SATA, SGMII, HS-SGMII and SFI
interfaces.

Signed-off-by: Grzegorz Jaszczyk <j...@semihalf.com>
Reviewed-by: Igal Liberman <ig...@marvell.com>
Signed-off-by: Baruch Siach <bar...@tkos.co.il>
---
  drivers/phy/marvell/comphy_cp110.c | 816 ++++-------------------------
  1 file changed, 89 insertions(+), 727 deletions(-)

diff --git a/drivers/phy/marvell/comphy_cp110.c 
b/drivers/phy/marvell/comphy_cp110.c
index 15e80049def6..31baa0bb3700 100644
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -7,6 +7,7 @@
  #include <fdtdec.h>
  #include <log.h>
  #include <asm/io.h>
+#include <asm/ptrace.h>
  #include <asm/arch/cpu.h>
  #include <asm/arch/soc.h>
  #include <linux/delay.h>
@@ -22,6 +23,32 @@ DECLARE_GLOBAL_DATA_PTR;
  #define HPIPE_ADDR(base, lane)                        (SD_ADDR(base, lane) + 
0x800)
  #define COMPHY_ADDR(base, lane)                       (base + 0x28 * lane)
+/* Firmware related definitions used for SMC calls */
+#define MV_SIP_COMPHY_POWER_ON 0x82000001
+#define MV_SIP_COMPHY_POWER_OFF        0x82000002
+#define MV_SIP_COMPHY_PLL_LOCK 0x82000003
+
+#define COMPHY_FW_MODE_FORMAT(mode)            ((mode) << 12)
+#define COMPHY_FW_FORMAT(mode, idx, speeds)    \
+                       (((mode) << 12) | ((idx) << 8) | ((speeds) << 2))
+#define COMPHY_SATA_MODE       0x1
+#define COMPHY_SGMII_MODE      0x2     /* SGMII 1G */
+#define COMPHY_HS_SGMII_MODE   0x3     /* SGMII 2.5G */
+#define COMPHY_USB3H_MODE      0x4
+#define COMPHY_USB3D_MODE      0x5
+#define COMPHY_PCIE_MODE       0x6
+#define COMPHY_RXAUI_MODE      0x7
+#define COMPHY_XFI_MODE                0x8
+#define COMPHY_SFI_MODE                0x9
+#define COMPHY_USB3_MODE       0xa
+#define COMPHY_AP_MODE         0xb

These same constants can be used for Armada 3720, btw... And maybe even
the code itself. So if this works, after it is applied I will try to
make this driver support Armada 3720 as well.

Good.

BTW, my opinion on using firmware calls in kernel for this changed
recently, when encountering problems on EspressoBIN which were result
of many people simply not upgrading the firmware... I now think kernel
should not depend on the firmware for this and implement this on its
own... But I think U-Boot is ok.

I'm okay with these patches in general as well, but I would like to see
some users testing them on their Armada 7k/8k boards. Marek?

Thanks,
Stefan

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