Hi Patrick On 10/15/20 3:01 PM, Patrick Delaunay wrote: > Use the reset function to handle the hold boot bit in RCC > with device tree handle with MCU_HOLD_BOOT identifier. > > This generic reset allows to remove the two specific properties: > - st,syscfg-holdboot > - st,syscfg-tz > > This patch prepares alignment with kernel device tree. > > Signed-off-by: Patrick Delaunay <[email protected]> > Cc: Fabien DESSENNE <[email protected]> > Cc: Arnaud POULIQUEN <[email protected]> > --- > > arch/arm/dts/stm32mp15-u-boot.dtsi | 7 +++ > drivers/remoteproc/stm32_copro.c | 93 ++++++++---------------------- > 2 files changed, 32 insertions(+), 68 deletions(-) > > diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi > b/arch/arm/dts/stm32mp15-u-boot.dtsi > index 7ec90fe4a3..d0aa5eabe5 100644 > --- a/arch/arm/dts/stm32mp15-u-boot.dtsi > +++ b/arch/arm/dts/stm32mp15-u-boot.dtsi > @@ -159,6 +159,13 @@ > u-boot,dm-pre-proper; > }; > > +/* temp = waiting kernel update */ > +&m4_rproc { > + resets = <&rcc MCU_R>, > + <&rcc MCU_HOLD_BOOT_R>; > + reset-names = "mcu_rst", "hold_boot"; > +}; > + > &pinctrl { > u-boot,dm-pre-reloc; > }; > diff --git a/drivers/remoteproc/stm32_copro.c > b/drivers/remoteproc/stm32_copro.c > index 33b574b1bd..da678cb329 100644 > --- a/drivers/remoteproc/stm32_copro.c > +++ b/drivers/remoteproc/stm32_copro.c > @@ -8,30 +8,21 @@ > #include <errno.h> > #include <fdtdec.h> > #include <log.h> > -#include <regmap.h> > #include <remoteproc.h> > #include <reset.h> > -#include <syscon.h> > #include <asm/io.h> > #include <dm/device_compat.h> > #include <linux/err.h> > > -#define RCC_GCR_HOLD_BOOT 0 > -#define RCC_GCR_RELEASE_BOOT 1 > - > /** > * struct stm32_copro_privdata - power processor private data > * @reset_ctl: reset controller handle > - * @hold_boot_regmap: regmap for remote processor reset hold boot > - * @hold_boot_offset: offset of the register controlling the hold > boot setting > - * @hold_boot_mask: bitmask of the register for the hold boot field > + * @hold_boot: hold boot controller handle > * @rsc_table_addr: resource table address > */ > struct stm32_copro_privdata { > struct reset_ctl reset_ctl; > - struct regmap *hold_boot_regmap; > - uint hold_boot_offset; > - uint hold_boot_mask; > + struct reset_ctl hold_boot; > ulong rsc_table_addr; > }; > > @@ -43,32 +34,19 @@ struct stm32_copro_privdata { > static int stm32_copro_probe(struct udevice *dev) > { > struct stm32_copro_privdata *priv; > - struct regmap *regmap; > - const fdt32_t *cell; > - int len, ret; > + int ret; > > priv = dev_get_priv(dev); > > - regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscfg-holdboot"); > - if (IS_ERR(regmap)) { > - dev_err(dev, "unable to find holdboot regmap (%ld)\n", > - PTR_ERR(regmap)); > - return PTR_ERR(regmap); > - } > - > - cell = dev_read_prop(dev, "st,syscfg-holdboot", &len); > - if (len < 3 * sizeof(fdt32_t)) { > - dev_err(dev, "holdboot offset and mask not available\n"); > - return -EINVAL; > + ret = reset_get_by_name(dev, "mcu_rst", &priv->reset_ctl); > + if (ret) { > + dev_err(dev, "failed to get reset (%d)\n", ret); > + return ret; > } > > - priv->hold_boot_regmap = regmap; > - priv->hold_boot_offset = fdtdec_get_number(cell + 1, 1); > - priv->hold_boot_mask = fdtdec_get_number(cell + 2, 1); > - > - ret = reset_get_by_index(dev, 0, &priv->reset_ctl); > + ret = reset_get_by_name(dev, "hold_boot", &priv->hold_boot); > if (ret) { > - dev_err(dev, "failed to get reset (%d)\n", ret); > + dev_err(dev, "failed to get hold boot (%d)\n", ret); > return ret; > } > > @@ -77,35 +55,6 @@ static int stm32_copro_probe(struct udevice *dev) > return 0; > } > > -/** > - * stm32_copro_set_hold_boot() - Hold boot bit management > - * @dev: corresponding STM32 remote processor device > - * @hold: hold boot value > - * @return 0 if all went ok, else corresponding -ve error > - */ > -static int stm32_copro_set_hold_boot(struct udevice *dev, bool hold) > -{ > - struct stm32_copro_privdata *priv; > - uint val; > - int ret; > - > - priv = dev_get_priv(dev); > - > - val = hold ? RCC_GCR_HOLD_BOOT : RCC_GCR_RELEASE_BOOT; > - > - /* > - * Note: shall run an SMC call (STM32_SMC_RCC) if platform is secured. > - * To be updated when the code for this SMC service is available which > - * is not the case for the time being. > - */ > - ret = regmap_update_bits(priv->hold_boot_regmap, priv->hold_boot_offset, > - priv->hold_boot_mask, val); > - if (ret) > - dev_err(dev, "failed to set hold boot\n"); > - > - return ret; > -} > - > /** > * stm32_copro_device_to_virt() - Convert device address to virtual address > * @dev: corresponding STM32 remote processor device > @@ -149,9 +98,11 @@ static int stm32_copro_load(struct udevice *dev, ulong > addr, ulong size) > > priv = dev_get_priv(dev); > > - ret = stm32_copro_set_hold_boot(dev, true); > - if (ret) > + ret = reset_assert(&priv->hold_boot); > + if (ret) { > + dev_err(dev, "Unable to assert hold boot (ret=%d)\n", ret); > return ret; > + } > > ret = reset_assert(&priv->reset_ctl); > if (ret) { > @@ -180,16 +131,20 @@ static int stm32_copro_start(struct udevice *dev) > > priv = dev_get_priv(dev); > > - /* move hold boot from true to false start the copro */ > - ret = stm32_copro_set_hold_boot(dev, false); > - if (ret) > + ret = reset_deassert(&priv->hold_boot); > + if (ret) { > + dev_err(dev, "Unable to deassert hold boot (ret=%d)\n", ret); > return ret; > + } > > /* > * Once copro running, reset hold boot flag to avoid copro > * rebooting autonomously > */ > - ret = stm32_copro_set_hold_boot(dev, true); > + ret = reset_assert(&priv->hold_boot); > + if (ret) > + dev_err(dev, "Unable to assert hold boot (ret=%d)\n", ret); > + > writel(ret ? TAMP_COPRO_STATE_OFF : TAMP_COPRO_STATE_CRUN, > TAMP_COPRO_STATE); > if (!ret) > @@ -211,9 +166,11 @@ static int stm32_copro_reset(struct udevice *dev) > > priv = dev_get_priv(dev); > > - ret = stm32_copro_set_hold_boot(dev, true); > - if (ret) > + ret = reset_assert(&priv->hold_boot); > + if (ret) { > + dev_err(dev, "Unable to assert hold boot (ret=%d)\n", ret); > return ret; > + } > > ret = reset_assert(&priv->reset_ctl); > if (ret) {
Reviewed-by: Patrice Chotard <[email protected]> Thanks
