> From: Brad Kim [mailto:[email protected]] > Sent: Friday, November 13, 2020 7:48 PM > To: Rick Jian-Zhi Chen(陳建志); [email protected] > Cc: [email protected]; [email protected]; [email protected]; Brad Kim > Subject: [PATCH] riscv: fix the wrong swap value register > > Not s2 register, t1 register is correct > Fortunately, it works because t1 register has a garbage value > > Signed-off-by: Brad Kim <[email protected]> > --- > arch/riscv/cpu/start.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >
Reviewed-by: Rick Chen <[email protected]> > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S > index bbc737ed9a..8589509e01 100644 > --- a/arch/riscv/cpu/start.S > +++ b/arch/riscv/cpu/start.S > @@ -123,7 +123,7 @@ call_board_init_f_0: > * wait for initialization to complete. > */ > la t0, hart_lottery > - li s2, 1 > + li t1, 1 > amoswap.w s2, t1, 0(t0) > bnez s2, wait_for_gd_init > #else > -- > 2.17.1 >
