Hello Adam, > -----Original Message----- > From: Adam Ford <[email protected]> > Sent: Saturday, December 5, 2020 1:43 AM > To: ZHIZHIKIN Andrey <[email protected]> > Cc: U-Boot Mailing List <[email protected]>; Stefano Babic > <[email protected]>; Ye Li <[email protected]> > Subject: Re: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties > > On Tue, Dec 1, 2020 at 7:32 AM Andrey Zhizhikin <andrey.zhizhikin@leica- > geosystems.com> wrote: > > > > i.MX8M series provide support for high speed grades in their usdhc > > controllers, which has eMMC and SDHC connected to them. > > > > Enable this support across the entire i.MX8M family by providing > > quirks to usdhc controllers designated by storage media connected to them. > > > > Signed-off-by: Andrey Zhizhikin > > <[email protected]> > > Cc: Stefano Babic <[email protected]> > > Cc: Ye Li <[email protected]> > > --- > > arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ > > arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ > > arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ > > arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ > > arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ > > arch/arm/dts/imx8mq-evk.dts | 3 +++ > > 6 files changed, 21 insertions(+) > > > > diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi > > b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi > > index 80d6475b7c..2f86fcce3e 100644 > > --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi > > +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi > > @@ -118,8 +118,11 @@ > > > > &usdhc1 { > > u-boot,dm-spl; > > + u-boot,mmc-hs400-1_8v; > > }; > > > > I don't think the "u-boot," prefix is needed. Looking at other boards' device > trees, they don't seem to have this.
Correct, I've already realized that and currently working on V3 of the series: https://lists.denx.de/pipermail/u-boot/2020-December/434159.html Thanks a lot for testing it though! > I tried it on the beacon imx8mm-beacon-kit, and it didn't work until I removed > the "u-boot," I believe you had it tested with your patches on top, since it would also require additional config options to be set, which you introduced for imx8mm-beacon-kit. As I see it now - those changes might be useful and applicable to all imx8m* derivatives and I'm thinking to move those binding to base dtsi files then. Would there be any objections here? > > With that removed, I can get the following: > > u-boot=> mmc info > Device: FSL_SDHC > Manufacturer ID: 27 > OEM: 5048 > Name: SD32G > Bus Speed: 200000000 > Mode: UHS SDR104 (208MHz) > Rd Block Len: 512 > SD version 3.0 > High Capacity: Yes > Capacity: 29 GiB > Bus Width: 4-bit > Erase Group Size: 512 Bytes > u-boot=> > > and > > u-boot=> mmc info > Device: FSL_SDHC > Manufacturer ID: 45 > OEM: 100 > Name: DG403 > Bus Speed: 200000000 > Mode: HS400 (200MHz) > Rd Block Len: 512 > MMC version 5.1 > High Capacity: Yes > Capacity: 29.1 GiB > Bus Width: 8-bit DDR > Erase Group Size: 512 KiB > HC WP Group Size: 8 MiB > User Capacity: 29.1 GiB WRREL > Boot Capacity: 4 MiB ENH > RPMB Capacity: 4 MiB ENH > Boot area 0 is not write protected > Boot area 1 is not write protected > u-boot=> > > adam > > > &usdhc2 { > > u-boot,dm-spl; > > + u-boot,sd-uhs-sdr104; > > + u-boot,sd-uhs-ddr50; > > }; > > diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi > > b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi > > index 771ab635f1..f4332edac5 100644 > > --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi > > +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi > > @@ -118,8 +118,11 @@ > > > > &usdhc1 { > > u-boot,dm-spl; > > + u-boot,mmc-hs400-1_8v; > > }; > > > > &usdhc2 { > > u-boot,dm-spl; > > + u-boot,sd-uhs-sdr104; > > + u-boot,sd-uhs-ddr50; > > }; > > diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > b/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > index 9f77d3c6ff..67666a08ec 100644 > > --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > @@ -100,10 +100,14 @@ > > > > &usdhc2 { > > u-boot,dm-spl; > > + u-boot,sd-uhs-sdr104; > > + u-boot,sd-uhs-ddr50; > > }; > > > > &usdhc3 { > > u-boot,dm-spl; > > + u-boot,mmc-hs400-1_8v; > > + u-boot,mmc-hs400-enhanced-strobe; > > }; > > > > &i2c1 { > > diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi > > b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi > > index 98b0b9891b..e03e635213 100644 > > --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi > > +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi > > @@ -97,10 +97,14 @@ > > > > &usdhc2 { > > u-boot,dm-spl; > > + u-boot,sd-uhs-sdr104; > > + u-boot,sd-uhs-ddr50; > > }; > > > > &usdhc3 { > > u-boot,dm-spl; > > + u-boot,mmc-hs400-1_8v; > > + u-boot,mmc-hs400-enhanced-strobe; > > }; > > > > &wdog1 { > > diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi > > b/arch/arm/dts/imx8mp-evk-u-boot.dtsi > > index 2452e9175c..0776b24a6e 100644 > > --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi > > +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi > > @@ -126,10 +126,14 @@ > > > > &usdhc2 { > > u-boot,dm-spl; > > + u-boot,sd-uhs-sdr104; > > + u-boot,sd-uhs-ddr50; > > }; > > > > &usdhc3 { > > u-boot,dm-spl; > > + u-boot,mmc-hs400-1_8v; > > + u-boot,mmc-hs400-enhanced-strobe; > > }; > > > > &wdog1 { > > diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts > > index 9663683f69..985e7e7f8b 100644 > > --- a/arch/arm/dts/imx8mq-evk.dts > > +++ b/arch/arm/dts/imx8mq-evk.dts > > @@ -291,6 +291,7 @@ > > non-removable; > > no-sd; > > no-sdio; > > + u-boot,mmc-hs400-1_8v; > > status = "okay"; > > }; > > > > @@ -301,6 +302,8 @@ > > pinctrl-2 = <&pinctrl_usdhc2_200mhz>; > > cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; > > vmmc-supply = <®_usdhc2_vmmc>; > > + u-boot,sd-uhs-sdr104; > > + u-boot,sd-uhs-ddr50; > > status = "okay"; > > }; > > > > -- > > 2.17.1 > > -- andrey
