From: "SkyLake.Huang" <skylake.hu...@mediatek.com>
1. Enable MTK SPI NOR controller driver on mt7622 & mt7629.
2. Enable quad mode for read and single mode for write.
Signed-off-by: SkyLake.Huang <skylake.hu...@mediatek.com>
---
arch/arm/dts/mt7622-rfb.dts | 16 +++++++++++++++-
arch/arm/dts/mt7622.dtsi | 11 +++++++++++
arch/arm/dts/mt7629-rfb.dts | 16 +++++++++++++++-
arch/arm/dts/mt7629.dtsi | 11 +++++++++++
configs/mt7622_rfb_defconfig | 3 ++-
configs/mt7629_rfb_defconfig | 3 ++-
6 files changed, 56 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts
index ef7d0f0270..c2f1ad2011 100644
--- a/arch/arm/dts/mt7622-rfb.dts
+++ b/arch/arm/dts/mt7622-rfb.dts
@@ -19,7 +19,7 @@
};
aliases {
- spi0 = &snfi;
+ spi0 = &snor;
};
memory@40000000 {
@@ -165,11 +165,25 @@
pinctrl-names = "default", "snfi";
pinctrl-0 = <&snor_pins>;
pinctrl-1 = <&snfi_pins>;
+ status = "disabled";
+
+ spi-flash@0{
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&snor {
+ pinctrl-names = "default";
+ pinctrl-0 = <&snor_pins>;
status = "okay";
spi-flash@0{
compatible = "jedec,spi-nor";
reg = <0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi
index 5c2e0251de..0127474c95 100644
--- a/arch/arm/dts/mt7622.dtsi
+++ b/arch/arm/dts/mt7622.dtsi
@@ -53,6 +53,17 @@
#size-cells = <0>;
};
+ snor: snor@11014000 {
+ compatible = "mediatek,mtk-snor";
+ reg = <0x11014000 0x1000>;
+ clocks = <&pericfg CLK_PERI_FLASH_PD>,
+ <&topckgen CLK_TOP_FLASH_SEL>;
+ clock-names = "spi", "sf";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts
index 5cc7294de6..df43cc49c5 100644
--- a/arch/arm/dts/mt7629-rfb.dts
+++ b/arch/arm/dts/mt7629-rfb.dts
@@ -14,7 +14,7 @@
compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
aliases {
- spi0 = &snfi;
+ spi0 = &snor;
};
chosen {
@@ -69,11 +69,25 @@
pinctrl-names = "default", "snfi";
pinctrl-0 = <&snor_pins>;
pinctrl-1 = <&snfi_pins>;
+ status = "disabled";
+
+ spi-flash@0{
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&snor {
+ pinctrl-names = "default";
+ pinctrl-0 = <&snor_pins>;
status = "okay";
spi-flash@0{
compatible = "jedec,spi-nor";
reg = <0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi
index 6850e0058d..05394266e0 100644
--- a/arch/arm/dts/mt7629.dtsi
+++ b/arch/arm/dts/mt7629.dtsi
@@ -223,6 +223,17 @@
#size-cells = <0>;
};
+ snor: snor@11014000 {
+ compatible = "mediatek,mtk-snor";
+ reg = <0x11014000 0x1000>;
+ clocks = <&pericfg CLK_PERI_FLASH_PD>,
+ <&topckgen CLK_TOP_FLASH_SEL>;
+ clock-names = "spi", "sf";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
ssusbsys: ssusbsys@1a000000 {
compatible = "mediatek,mt7629-ssusbsys", "syscon";
reg = <0x1a000000 0x1000>;
diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig
index ccf926e104..347f5f6b12 100644
--- a/configs/mt7622_rfb_defconfig
+++ b/configs/mt7622_rfb_defconfig
@@ -49,7 +49,8 @@ CONFIG_DM_SERIAL=y
CONFIG_MTK_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
-CONFIG_MTK_SNFI_SPI=y
+# CONFIG_MTK_SNFI_SPI is not set
+CONFIG_MTK_SNOR=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_TIMER=y
CONFIG_MTK_TIMER=y
diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig
index d9032d4493..3691223510 100644
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -75,7 +75,8 @@ CONFIG_DM_SERIAL=y
CONFIG_MTK_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
-CONFIG_MTK_SNFI_SPI=y
+# CONFIG_MTK_SNFI_SPI is not set
+CONFIG_MTK_SNOR=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_WATCHDOG=y
--
2.18.0
