> From: Mark Kettenis <[email protected]> > Date: Wed, 10 Feb 2021 19:25:53 +0100 > > On implementations that support VHE, the layout of the CPTR_EL2 > register depends on whether HCR_EL2.E2H is set. If the bit is > set, CPTR_EL2 uses the same layout as CPACR_EL1 and can in fact > be accessed through that register. In that case, jump to the > EL1 code to enable access to the FP/SIMD registers. This allows > U-Boot to run on systems that pass control to U-Boot in EL2 with > EL2 Host mode enabled such as machines using Apple's M1 SoC. > > Signed-off-by: Mark Kettenis <[email protected]> > ---
Please disregard, I forgot to commit the actual change. > v3: use EL1 codepath when HCR_EL2.E2H is set > suggested by Marc Zyngier <[email protected]> > > v2: rename label > > arch/arm/cpu/armv8/start.S | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S > index 662449156b..979dcfef35 100644 > --- a/arch/arm/cpu/armv8/start.S > +++ b/arch/arm/cpu/armv8/start.S > @@ -133,9 +133,15 @@ pie_fixup_done: > #endif > b 0f > 2: set_vbar vbar_el2, x0 > + mrs x0, hcr_el2 > + tbnz x0, #34, el2_vhe /* HCR_EL2.E2H */ > mov x0, #0x33ff > msr cptr_el2, x0 /* Enable FP/SIMD */ > b 0f > +el2_vhe: > + mov x0, #3 << 20 > + msr cptr_el2, x0 /* Enable FP/SIMD */ > + b 0f > 1: set_vbar vbar_el1, x0 > mov x0, #3 << 20 > msr cpacr_el1, x0 /* Enable FP/SIMD */ > -- > 2.30.0 > >
