Hi Marek, On Thu, 2021-02-25 at 21:52 +0100, Marek Vasut wrote: > Caution: EXT Email > > The OCRAM_S is regular memory, just like the OCRAM, add it to the MMU > tables so it can be used and cached. > > Signed-off-by: Marek Vasut <[email protected]> > Cc: Fabio Estevam <[email protected]> > Cc: Peng Fan <[email protected]> > Cc: Stefano Babic <[email protected]> > --- > arch/arm/mach-imx/imx8m/soc.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach- > imx/imx8m/soc.c > index 5456c10fb17..225e4e12500 100644 > --- a/arch/arm/mach-imx/imx8m/soc.c > +++ b/arch/arm/mach-imx/imx8m/soc.c > @@ -104,6 +104,13 @@ static struct mm_region imx8m_mem_map[] = { > .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | > PTE_BLOCK_NON_SHARE | > PTE_BLOCK_PXN | PTE_BLOCK_UXN > + }, { > + /* OCRAM_S */ > + .virt = 0x180000UL, > + .phys = 0x180000UL, > + .size = 0x8000UL, > + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | > + PTE_BLOCK_OUTER_SHARE > }, { > /* TCM */ > .virt = 0x7C0000UL, > -- > 2.30.0 > OCRAM_S is used by ATF and SPL to pass DDR CSR data. It is better not use it in u-boot to avoid any DDR issue. And this imx8m_mem_map will be modified at runtime to get rid of optee memory. When OCRAM_S is added, the index used in enable_caches and dram_init need update as well.
Best regards, Ye Li
