On Thu, Mar 11, 2021 at 03:30:51PM +0800, Zhiqiang Hou wrote: > From: Hou Zhiqiang <[email protected]> > > As on some incipient Layerscape platforms (LS1043A series) there isn't > separate PF control register block, these registers reside in the LUT > register block, so when the driver detected there isn't 'ctrl', it will > assign the 'lut' address to the ls_pcie->ctrl. > > The current code allocate memory for the struct ls_pcie with random > contents, this can result in skipping to assign the ls_pcie->ctrl with > the 'lut' address, then further crash with the incorrect address. > > Fixes: 118e58e26eba ("pci: layerscape: Split the EP and RC driver") > Signed-off-by: Hou Zhiqiang <[email protected]> > ---
Reviewed-by: Vladimir Oltean <[email protected]>
