st 24. 2. 2021 v 10:11 odesÃlatel Michal Simek <michal.si...@xilinx.com> napsal: > > From: Amit Kumar Mahapatra <amit.kumar-mahapa...@xilinx.com> > > In zynqmp.dtsi file renamed "clk_sys" clock to "controller" and > "clk_flash" clock to "bus" as per upstreamed Arasan NAND driver. > This fixes NAND driver probe failure. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapa...@xilinx.com> > Signed-off-by: Michal Simek <michal.si...@xilinx.com> > --- > > arch/arm/dts/zynqmp.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi > index aa0ac95e122e..2917a956eb3d 100644 > --- a/arch/arm/dts/zynqmp.dtsi > +++ b/arch/arm/dts/zynqmp.dtsi > @@ -505,7 +505,7 @@ > compatible = "arasan,nfc-v3p10"; > status = "disabled"; > reg = <0x0 0xff100000 0x0 0x1000>; > - clock-names = "clk_sys", "clk_flash"; > + clock-names = "controller", "bus"; > interrupt-parent = <&gic>; > interrupts = <0 14 4>; > #address-cells = <1>; > -- > 2.30.0 >
Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
