Tim,

On Thu, Jul 1, 2021 at 10:13 PM Fabio Estevam <feste...@gmail.com> wrote:
>
> On Thu, Jul 1, 2021 at 9:49 PM Tim Harvey <thar...@gateworks.com> wrote:
>
> > By the way, I took a quick stab at enabling SDP on
> > imx8mm-venice-gw73xx-0x and found compile issues so I configured for
> > an imx8mm_evk using your diffs and hit the same issues.
> >
> > drivers/usb/host/ehci-mx6.c: In function ‘ehci_hcd_init’:
> > drivers/usb/host/ehci-mx6.c:360:46: error: ‘USB_BASE_ADDR’ undeclared
>
> Ah, now that I try to enable SDP I see these errors too. To fix this
> error we need:
> https://git.kontron-electronics.de/linux/u-boot/-/commit/975e36c71164483a7c690e81126f77f6de482378.patch
>
> This one is also needed:
> https://git.kontron-electronics.de/linux/u-boot/-/commit/344c83522650ef8d8ea6c12c6a8209e54f0f31e6.patch
>
>
> > (first use in this function); did you mean ‘SRC_BASE_ADDR’?
> >   struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR +
> >                                               ^~~~~~~~~~~~~
> >                                               SRC_BASE_ADDR
> > drivers/usb/host/ehci-mx6.c:360:46: note: each undeclared identifier
> > is reported only once for each function it appears in
> > drivers/usb/host/ehci-mx6.c:361:4: error: ‘controller_spacing’
>
> I need to check on this one.

Attached is a diff with all the changes that allow building SDP
support for imx8mm_evk.

But I still get:

U-Boot SPL 2021.07-rc5-00002-g5f269bf8bd14-dirty (Jul 01 2021 - 22:28:29 -0300)
WDT:   Not starting
SPL: Unsupported Boot Device!
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

Please let me know if you get any progress with SDP.

Thanks
From e7cc6989bd69eb0d346ae06023bb4525d4fc6858 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <feste...@gmail.com>
Date: Thu, 1 Jul 2021 22:33:12 -0300
Subject: [PATCH] imx8mmgadgetsdp

Signed-off-by: Fabio Estevam <feste...@gmail.com>
---
 arch/arm/include/asm/arch-imx8m/clock.h    |  1 +
 arch/arm/include/asm/arch-imx8m/imx-regs.h | 11 +++++
 arch/arm/mach-imx/imx8m/clock_imx8mm.c     | 16 +++++++
 configs/imx8mm_evk_defconfig               | 27 +++++++++++
 drivers/usb/host/ehci-mx6.c                | 54 +++++++++-------------
 5 files changed, 78 insertions(+), 31 deletions(-)

diff --git a/arch/arm/include/asm/arch-imx8m/clock.h b/arch/arm/include/asm/arch-imx8m/clock.h
index 77d9428a188a..fcd111c918fd 100644
--- a/arch/arm/include/asm/arch-imx8m/clock.h
+++ b/arch/arm/include/asm/arch-imx8m/clock.h
@@ -276,3 +276,4 @@ int enable_i2c_clk(unsigned char enable, unsigned int i2c_num);
 int set_clk_enet(enum enet_freq type);
 int set_clk_eqos(enum enet_freq type);
 void hab_caam_clock_enable(unsigned char enable);
+void enable_usboh3_clk(unsigned char enable);
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index b800da13a1e4..de01e9969626 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -51,6 +51,17 @@
 
 #define TZASC_BASE_ADDR		0x32F80000
 
+#ifdef CONFIG_IMX8MM
+#define USB1_BASE_ADDR		0x32E40000
+#define USB2_BASE_ADDR		0x32E50000
+#else
+#define USB1_BASE_ADDR		0x38100000
+#define USB2_BASE_ADDR		0x38200000
+#endif
+#define USB_BASE_ADDR		USB1_BASE_ADDR
+#define USB1_PHY_BASE_ADDR	0x381F0000
+#define USB2_PHY_BASE_ADDR	0x382F0000
+
 #define MXS_LCDIF_BASE		IS_ENABLED(CONFIG_IMX8MQ) ? \
 					0x30320000 : 0x32e00000
 
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index f8e4ec0d9052..dd40e2f1e772 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -277,6 +277,22 @@ int intpll_configure(enum pll_clocks pll, ulong freq)
 	return 0;
 }
 
+void enable_usboh3_clk(unsigned char enable)
+{
+	if (enable) {
+		clock_enable(CCGR_USB_MSCALE_PL301, 0);
+		/* 500M */
+		clock_set_target_val(USB_BUS_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(1));
+		/* 100M */
+		clock_set_target_val(USB_CORE_REF_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(1));
+		/* 100M */
+		clock_set_target_val(USB_PHY_REF_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(1));
+		clock_enable(CCGR_USB_MSCALE_PL301, 1);
+	} else {
+		clock_enable(CCGR_USB_MSCALE_PL301, 0);
+	}
+}
+
 void init_uart_clk(u32 index)
 {
 	/*
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index a06c6f9794ac..88a95a4fe5b5 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -85,3 +85,30 @@ CONFIG_SYSRESET_PSCI=y
 CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
 CONFIG_IMX_WATCHDOG=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_LAN75XX=y
+CONFIG_USB_ETHER_LAN78XX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_IMX8M_POWER_DOMAIN=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_CMD_USB_SDP=y
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index c3e4170513ec..83f63e4cc930 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -141,12 +141,12 @@ static void __maybe_unused
 usb_power_config_mx6(void *anatop, int anatop_bits_index) { }
 #endif
 
-#if defined(CONFIG_MX7) && !defined(CONFIG_PHY)
+#if (defined(CONFIG_MX7) || defined(CONFIG_IMX8M))&& !defined(CONFIG_PHY)
 static void usb_power_config_mx7(struct usbnc_regs *usbnc)
 {
 	void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2);
 
-	if (!is_mx7())
+	if (!is_mx7() || !is_imx8mm())
 		return;
 
 	/*
@@ -248,7 +248,7 @@ int usb_phy_mode(int port)
 		return USB_INIT_HOST;
 }
 
-#elif defined(CONFIG_MX7)
+#elif defined(CONFIG_MX7) || defined(CONFIG_IMX8M)
 int usb_phy_mode(int port)
 {
 	struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
@@ -346,7 +346,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 		(struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
 	struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
 			USB_OTHERREGS_OFFSET);
-#elif defined(CONFIG_MX7)
+#elif defined(CONFIG_MX7) || defined(CONFIG_IMX8M)
 	u32 controller_spacing = 0x10000;
 	struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
 			(0x10000 * index) + USBNC_OFFSET);
@@ -390,7 +390,9 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 	usb_power_config_mx7ulp(usbphy);
 #endif
 
+#if !defined(CONFIG_PHY)
 	usb_oc_config(usbnc, index);
+#endif
 
 #if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) || defined(CONFIG_IMXRT)
 	if (index < ARRAY_SIZE(phy_bases)) {
@@ -523,7 +525,7 @@ static int ehci_usb_phy_mode(struct udevice *dev)
 			plat->init_type = USB_INIT_DEVICE;
 		else
 			plat->init_type = USB_INIT_HOST;
-	} else if (is_mx7()) {
+	} else if (is_mx7() || is_imx8mm()) {
 		phy_status = (void __iomem *)(addr +
 					      USBNC_PHY_STATUS_OFFSET);
 		val = readl(phy_status);
@@ -539,28 +541,6 @@ static int ehci_usb_phy_mode(struct udevice *dev)
 	return 0;
 }
 
-static int ehci_usb_of_to_plat(struct udevice *dev)
-{
-	struct usb_plat *plat = dev_get_plat(dev);
-	enum usb_dr_mode dr_mode;
-
-	dr_mode = usb_get_dr_mode(dev_ofnode(dev));
-
-	switch (dr_mode) {
-	case USB_DR_MODE_HOST:
-		plat->init_type = USB_INIT_HOST;
-		break;
-	case USB_DR_MODE_PERIPHERAL:
-		plat->init_type = USB_INIT_DEVICE;
-		break;
-	case USB_DR_MODE_OTG:
-	case USB_DR_MODE_UNKNOWN:
-		return ehci_usb_phy_mode(dev);
-	};
-
-	return 0;
-}
-
 static int mx6_parse_dt_addrs(struct udevice *dev)
 {
 #if !defined(CONFIG_PHY)
@@ -622,7 +602,6 @@ static int ehci_usb_probe(struct udevice *dev)
 	struct usb_plat *plat = dev_get_plat(dev);
 	struct usb_ehci *ehci = dev_read_addr_ptr(dev);
 	struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
-	enum usb_init_type type = plat->init_type;
 	struct ehci_hccr *hccr;
 	struct ehci_hcor *hcor;
 	int ret;
@@ -640,7 +619,6 @@ static int ehci_usb_probe(struct udevice *dev)
 		return ret;
 
 	priv->ehci = ehci;
-	priv->init_type = type;
 
 #if CONFIG_IS_ENABLED(CLK)
 	ret = clk_get_by_index(dev, 0, &priv->clk);
@@ -656,6 +634,21 @@ static int ehci_usb_probe(struct udevice *dev)
 	mdelay(1);
 #endif
 
+	switch (usb_get_dr_mode(dev_ofnode(dev))) {
+	case USB_DR_MODE_HOST:
+		plat->init_type = USB_INIT_HOST;
+		break;
+	case USB_DR_MODE_PERIPHERAL:
+		plat->init_type = USB_INIT_DEVICE;
+		break;
+	case USB_DR_MODE_OTG:
+	case USB_DR_MODE_UNKNOWN:
+		ret = ehci_usb_phy_mode(dev);
+		if (ret)
+			return ret;
+	};
+	priv->init_type = plat->init_type;
+
 #if CONFIG_IS_ENABLED(DM_REGULATOR)
 	ret = device_get_supply_regulator(dev, "vbus-supply",
 					  &priv->vbus_supply);
@@ -679,7 +672,7 @@ static int ehci_usb_probe(struct udevice *dev)
 #if CONFIG_IS_ENABLED(DM_REGULATOR)
 	if (priv->vbus_supply) {
 		ret = regulator_set_enable(priv->vbus_supply,
-					   (type == USB_INIT_DEVICE) ?
+					   (priv->init_type == USB_INIT_DEVICE) ?
 					   false : true);
 		if (ret && ret != -ENOSYS) {
 			printf("Error enabling VBUS supply (ret=%i)\n", ret);
@@ -764,7 +757,6 @@ U_BOOT_DRIVER(usb_mx6) = {
 	.name	= "ehci_mx6",
 	.id	= UCLASS_USB,
 	.of_match = mx6_usb_ids,
-	.of_to_plat = ehci_usb_of_to_plat,
 	.probe	= ehci_usb_probe,
 	.remove = ehci_usb_remove,
 	.ops	= &ehci_usb_ops,
-- 
2.25.1

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