This series adds PCI-express host controller support for UniPhier SoCs. This also adds clock, reset, and phy support to enable the controller.
The controller is based on DW PCIe IP, however, the controller doesn't have unroll version of iATU, so this series doesn't apply common DW functions yet. And this series includes Akebi96 board (96boards) support that has UniPhier LD20 SoC and PCIe interface. The controller is available for LD20 and PXs3 SoCs, and the devicetree already supports it. Kunihiko Hayashi (6): clk: uniphier: Add PCIe clock entry reset: uniphier: Add PCIe reset entry phy: socionext: Add UniPhier PCIe PHY driver pci: uniphier: Add UniPhier PCIe controller driver configs: uniphier: Enable CONFIG_SYS_PCI_64BIT ARM: dts: uniphier: Add support for Akebi96 arch/arm/dts/Makefile | 1 + arch/arm/dts/uniphier-ld20-akebi96.dts | 189 +++++++++++++ drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/clk/uniphier/clk-uniphier-sys.c | 3 + drivers/pci/Kconfig | 10 + drivers/pci/Makefile | 1 + drivers/pci/pcie_uniphier.c | 424 ++++++++++++++++++++++++++++++ drivers/phy/socionext/Kconfig | 12 + drivers/phy/socionext/Makefile | 6 + drivers/phy/socionext/phy-uniphier-pcie.c | 59 +++++ drivers/reset/reset-uniphier.c | 3 + include/configs/uniphier.h | 2 + 13 files changed, 713 insertions(+) create mode 100644 arch/arm/dts/uniphier-ld20-akebi96.dts create mode 100644 drivers/pci/pcie_uniphier.c create mode 100644 drivers/phy/socionext/Kconfig create mode 100644 drivers/phy/socionext/Makefile create mode 100644 drivers/phy/socionext/phy-uniphier-pcie.c -- 2.7.4
