Hi Marek On Sun, 2021-09-12 at 00:43 +0200, Marek Vasut wrote: > Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131") > the Micrel PHY driver correctly configures the delay register. The Verdin PHY > is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.
Yes, however, one should also get rid of the proprietary PHY setup in our board setup. Remember, I already did send this as part of my target refresh series: https://marc.info/?l=u-boot&m=162990456210415 > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Marcel Ziswiler <marcel.ziswi...@toradex.com> > Cc: Max Krummenacher <max.krummenac...@toradex.com> > Cc: Oleksandr Suvorov <oleksandr.suvo...@toradex.com> > --- > arch/arm/dts/imx8mm-verdin.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts > index fb0756d6e19..ac2a4b69d3c 100644 > --- a/arch/arm/dts/imx8mm-verdin.dts > +++ b/arch/arm/dts/imx8mm-verdin.dts > @@ -160,7 +160,7 @@ > &fec1 { > fsl,magic-packet; > phy-handle = <ðphy0>; > - phy-mode = "rgmii"; > + phy-mode = "rgmii-id"; > phy-supply = <®_ethphy>; > pinctrl-names = "default", "sleep"; > pinctrl-0 = <&pinctrl_fec1>; Cheers Marcel