Hi Fabio, On Wed, Sep 15, 2021 at 9:21 PM Fabio Estevam <[email protected]> wrote: > > Hi Igor, > > On Wed, Sep 15, 2021 at 1:04 PM Igor Opaniuk <[email protected]> > wrote: > > > Maybe I misunderstood your question, > > but it's already in board/ea/mx7ulp_com/mx7ulp_com.c, no? > > The DDR initialization is currently at board/ea/mx7ulp_com/imximage.cfg. > > If the board supports SPL, I was expecting to see the DDR > initialization happen in C code instead.
The SPL for this board is built with prepended DCD which includes DDR training data (defined in imximage.cfg). So that the bootrom initializes DDR using DCD before jumping to SPL. Is it mandatory to move DDR init in C code for SPL-enabled setups? We wouldn't be changing it for now :( > Regards, > > Fabio Estevam -- Best regards Oleksandr Oleksandr Suvorov [email protected]
