On Sun, Sep 12, 2021 at 9:55 PM Gaurav Jain <[email protected]> wrote: > > Hello Tim, > > > -----Original Message----- > > From: Tim Harvey <[email protected]> > > Sent: Friday, September 10, 2021 8:17 PM > > To: Gaurav Jain <[email protected]> > > Cc: u-boot <[email protected]>; Stefano Babic <[email protected]>; Fabio > > Estevam <[email protected]>; Peng Fan <[email protected]>; Simon Glass > > <[email protected]>; Priyanka Jain <[email protected]>; Ye Li > > <[email protected]>; Horia Geanta <[email protected]>; Ji Luo > > <[email protected]>; Franck Lenormand <[email protected]>; Silvano Di > > Ninno <[email protected]>; Sahil Malhotra <[email protected]>; > > Pankaj Gupta <[email protected]>; Varun Sethi <[email protected]>; dl- > > uboot-imx <[email protected]>; Shengzhou Liu <[email protected]>; > > Mingkai Hu <[email protected]>; Rajesh Bhagat <[email protected]>; > > Meenakshi Aggarwal <[email protected]>; Wasim Khan > > <[email protected]>; Alison Wang <[email protected]>; Pramod > > Kumar <[email protected]>; Andy Tang <[email protected]>; > > Adrian Alonso <[email protected]>; Vladimir Oltean <[email protected]> > > Subject: [EXT] Re: [PATCH v2 03/15] i.MX8M: crypto: updated device tree for > > supporting DM in SPL > > > > Caution: EXT Email > > > > On Fri, Sep 3, 2021 at 12:04 AM Gaurav Jain <[email protected]> wrote: > > > > > > disabled use of JR0 in SPL and uboot, as JR0 is reserved for secure > > > boot. > > > > > > Signed-off-by: Gaurav Jain <[email protected]> > > > --- > > > arch/arm/dts/imx8mm-evk-u-boot.dtsi | 18 +++++++++++++++++- > > > arch/arm/dts/imx8mm.dtsi | 1 + > > > arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 18 +++++++++++++++++- > > > arch/arm/dts/imx8mn.dtsi | 1 + > > > arch/arm/dts/imx8mp-evk-u-boot.dtsi | 18 +++++++++++++++++- > > > arch/arm/dts/imx8mp.dtsi | 1 + > > > arch/arm/dts/imx8mq.dtsi | 1 + > > > 7 files changed, 55 insertions(+), 3 deletions(-) > > > > > > diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > > b/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > > index f200afac9f..3c2502cbba 100644 > > > --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > > +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > > @@ -1,6 +1,6 @@ > > > // SPDX-License-Identifier: GPL-2.0+ > > > /* > > > - * Copyright 2019 NXP > > > + * Copyright 2019, 2021 NXP > > > */ > > > > > > #include "imx8mm-u-boot.dtsi" > > > @@ -72,6 +72,22 @@ > > > u-boot,dm-spl; > > > }; > > > > > > +&crypto { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&sec_jr0 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&sec_jr1 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&sec_jr2 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > &usdhc1 { > > > u-boot,dm-spl; > > > }; > > > diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi index > > > b142b80734..009999bf3a 100644 > > > --- a/arch/arm/dts/imx8mm.dtsi > > > +++ b/arch/arm/dts/imx8mm.dtsi > > > @@ -824,6 +824,7 @@ > > > compatible = > > > "fsl,sec-v4.0-job-ring"; > > > reg = <0x1000 0x1000>; > > > interrupts = <GIC_SPI 105 > > > IRQ_TYPE_LEVEL_HIGH>; > > > + status = "disabled"; > > > }; > > > > > > sec_jr1: jr@2000 { diff --git > > > a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi > > > b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi > > > index 1d3844437d..b462d24eb2 100644 > > > --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi > > > +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi > > > @@ -1,6 +1,6 @@ > > > // SPDX-License-Identifier: GPL-2.0+ > > > /* > > > - * Copyright 2019 NXP > > > + * Copyright 2019, 2021 NXP > > > */ > > > > > > / { > > > @@ -104,6 +104,22 @@ > > > u-boot,dm-spl; > > > }; > > > > > > +&crypto { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&sec_jr0 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&sec_jr1 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&sec_jr2 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > &usdhc1 { > > > u-boot,dm-spl; > > > }; > > > diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi index > > > edcb415b53..1820a5af37 100644 > > > --- a/arch/arm/dts/imx8mn.dtsi > > > +++ b/arch/arm/dts/imx8mn.dtsi > > > @@ -822,6 +822,7 @@ > > > compatible = > > > "fsl,sec-v4.0-job-ring"; > > > reg = <0x1000 0x1000>; > > > interrupts = <GIC_SPI 105 > > > IRQ_TYPE_LEVEL_HIGH>; > > > + status = "disabled"; > > > }; > > > > > > sec_jr1: jr@2000 { diff --git > > > a/arch/arm/dts/imx8mp-evk-u-boot.dtsi > > > b/arch/arm/dts/imx8mp-evk-u-boot.dtsi > > > index 2abcf1f03d..5415d5b617 100644 > > > --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi > > > +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi > > > @@ -1,6 +1,6 @@ > > > // SPDX-License-Identifier: GPL-2.0+ > > > /* > > > - * Copyright 2019 NXP > > > + * Copyright 2019, 2021 NXP > > > */ > > > > > > #include "imx8mp-u-boot.dtsi" > > > @@ -67,6 +67,22 @@ > > > u-boot,dm-spl; > > > }; > > > > > > +&crypto { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&sec_jr0 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&sec_jr1 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&sec_jr2 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > &i2c1 { > > > u-boot,dm-spl; > > > }; > > > diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi index > > > c2d51a46cb..57b01c3a57 100644 > > > --- a/arch/arm/dts/imx8mp.dtsi > > > +++ b/arch/arm/dts/imx8mp.dtsi > > > @@ -624,6 +624,7 @@ > > > compatible = > > > "fsl,sec-v4.0-job-ring"; > > > reg = <0x1000 0x1000>; > > > interrupts = <GIC_SPI 105 > > > IRQ_TYPE_LEVEL_HIGH>; > > > + status = "disabled"; > > > }; > > > > > > sec_jr1: jr@2000 { diff --git > > > a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi index > > > a44f729d0e..ecab44ca13 100644 > > > --- a/arch/arm/dts/imx8mq.dtsi > > > +++ b/arch/arm/dts/imx8mq.dtsi > > > @@ -955,6 +955,7 @@ > > > compatible = > > > "fsl,sec-v4.0-job-ring"; > > > reg = <0x1000 0x1000>; > > > interrupts = <GIC_SPI 105 > > > IRQ_TYPE_LEVEL_HIGH>; > > > + status = "disabled"; > > > }; > > > > > > sec_jr1: jr@2000 { > > > -- > > > 2.17.1 > > > > > > > Is there a reason these need to be in board specific dts vs the base ones > > that are > > included by all the boards? > > > > We have different clock for different boards and we want to control job rings > for each board separately. >
Gaurav, I agree that imx8mm, imx8mn, imx8mp all have different clocks but you are setting adding nodes to 'board' specific u-boot.dtsi's that include common files where instead they should go. For example arch/arm/dts/imx8mm-evk-u-boot.dtsi includes 'imx8mm-u-boot.dtsi' so you should be adding the crypto/sec_jr0/sec_jr1/sec_jr2 nodes there. Similarly arch/arm/dts/imx8mp-evk-u-boot.dtsi includes 'imx8mp-u-boot.dtsi' so they should go there. The addition of the common imx8mm-u-boot.dtsi and imx8mp-u-boot.dtsi is rather recent so you may not have seen that. Additionally there doesn't appear to be a common imx8mn-u-boot.dtsi yet and one should be created. Best regards, Tim
