From: Pali Rohár <[email protected]> Now that PCI Bridge is working for the PCIe Root Port, U-Boot's PCI_PNP code automatically enables memory access and bus mastering when needed.
We do not need to enable it when setting the HW up. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Marek Behún <[email protected]> --- drivers/pci/pci-aardvark.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 692210ded9..8c025dc45d 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -910,12 +910,6 @@ static int pcie_advk_setup_hw(struct pcie_advk *pcie) if (pcie_advk_wait_for_link(pcie)) return -ENXIO; - reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG); - reg |= PCIE_CORE_CMD_MEM_ACCESS_EN | - PCIE_CORE_CMD_IO_ACCESS_EN | - PCIE_CORE_CMD_MEM_IO_REQ_EN; - advk_writel(pcie, reg, PCIE_CORE_CMD_STATUS_REG); - return 0; } -- 2.32.0
