We appear to have different refclk's on the different corenet DS boards so move the define out of the common header.
Signed-off-by: Kumar Gala <[email protected]> --- include/configs/P4080DS.h | 2 ++ include/configs/corenet_ds.h | 1 - 2 files changed, 2 insertions(+), 1 deletions(-) diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index 87703c9..21b48e9 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -33,6 +33,8 @@ #define CONFIG_SYS_NUM_FM2_10GEC 1 #define CONFIG_NUM_DDR_CONTROLLERS 2 +#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */ + #define CONFIG_SYS_P4080_ERRATUM_CPU22 #define CONFIG_SYS_P4080_ERRATUM_SERDES8 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index c5dcdca..454a30a 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -68,7 +68,6 @@ #endif #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */ -#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */ /* * These can be toggled for performance analysis, otherwise use default. -- 1.7.2.3 _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
