Hi Ilias, On Fri, 5 Nov 2021 at 02:23, Ilias Apalodimas <[email protected]> wrote: > > On Fri, Nov 05, 2021 at 10:17:21AM +0200, Ilias Apalodimas wrote: > > Hi Simon, > > > > [...] > > > > > > + u8 *result) > > > > +{ > > > > + struct tpm_tis_chip_data *drv_data = (void > > > > *)dev_get_driver_data(udev); > > > > + > > > > + while (len--) > > > > + *result++ = ioread8(drv_data->iobase + addr); > > > > + return 0; > > > > +} > > > > + > > > > +static int mmio_write_bytes(struct udevice *udev, u32 addr, u16 len, > > > > + const u8 *value) > > > > +{ > > > > + struct tpm_tis_chip_data *drv_data = (void > > > > *)dev_get_driver_data(udev); > > > > + > > > > + while (len--) > > > > + iowrite8(*value++, drv_data->iobase + addr); > > > > > > So should this use regmap? > > > > > > > Isn't the point of regmap abstracting the bus access itself? Something > > along the lines of
It is for MMIO at present, but I suppose it could handle the bus. It would need to know about register numbers though, and we've never really figured out if it is a win or not. > > > > ******** ********** *********** > > * SPI ** --> * * --> * SPI DM ** --> Device > > ******** * * *********** > > * REGMAP * > > ******** * * > > * MMIO * --> * * --> ************** > > ******** ********** * MMIO access* --> > > Device > > > > ************** > > > > Hopefully I'll get the ASCII right this time... > > ******** ********** *********** > * SPI ** --> * * --> * SPI DM ** --> Device > ******** * * *********** > * REGMAP * > ******** * * > * MMIO * --> * * --> ************** > ******** ********** * MMIO access* --> Device > ************** > > Right now we have discrete drivers for the SPI and MMIO TPMs. > > However using it makes sense if we want to merge parts of the SPI, MMIO and > > I2C > > drivers in the future. That though is not what this patchset deals with. > > Let's first clean up the crud of the TIS APIs duplication we've been > > carrying over various TPM drivers and worry about consolidating the bus > > accesses later. That's OK with me. Regards, Simon
