The SCRATCHRW4 is only used in secure boot scenario that is unsupported by
our design, so this address can be stolen for storing POST status.
The SCRATCHRW4 is initialized to zero at core rest.
Using a DDR address was unfortunate choice, the DDR at boot time has a
random contend and it happens that sometimes is matching POST magic number.
This behavior can lead to undefined POST behavior and u-boot ending in
failbootcmd command.
Signed-off-by: Aleksandar Gerasimovski
<aleksandar.gerasimov...@hitachienergy.com>
---
board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
index a37d111..467f110 100644
--- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
+++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
@@ -162,19 +162,18 @@ int post_hotkeys_pressed(void)
return qrio_get_selftest_pin();
}
+/* POST word is located in the unused SCRATCHRW4 register */
+#define CCSR_SCRATCHRW4_ADDR 0x1ee020c
+
ulong post_word_load(void)
{
- /* POST word is located at the beginning of reserved physical RAM */
- void *addr = (void *)(CONFIG_SYS_SDRAM_BASE +
- gd->ram_size - CONFIG_KM_RESERVED_PRAM + 8);
+ void *addr = (void *)CCSR_SCRATCHRW4_ADDR;
return in_le32(addr);
}
void post_word_store(ulong value)
{
- /* POST word is located at the beginning of reserved physical RAM */
- void *addr = (void *)(CONFIG_SYS_SDRAM_BASE +
- gd->ram_size - CONFIG_KM_RESERVED_PRAM + 8);
+ void *addr = (void *)CCSR_SCRATCHRW4_ADDR;
out_le32(addr, value);
}
--
1.8.3.1
