On Wed, Nov 3, 2021 at 10:17 PM Tudor Ambarus <[email protected]> wrote: > > sama7g5 QSPI has: > 1/ One Octal Serial Peripheral Interfaces (QSPI0) Supporting Up to > 200 MHz DDR. Octal, TwinQuad, Hyperflash and OctaFlash Protocols Supported > 2/ One Quad Serial Peripheral Interfaces (QSPI1) Supporting Up to > 90 MHz DDR/133 MHz SDR > > The QSPI controller of SAMA7G5 uses different clock domains, hence extra > synchronization operations must be performed before accessing some > registers. Differentiate between the versions of the IP using has_gclk. > Differentiate between QSPI0 and QSPI1 with has_octal. > > Signed-off-by: Tudor Ambarus <[email protected]> > ---
Reviewed-by: Jagan Teki <[email protected]>
