Re: [PATCH] mxc_gpio: on imx8m read the DR instead of the PSR

[Angus Ainslie]

Hi Fabio,

On 2022-01-18 08:59, Fabio Estevam wrote:
Hi Angus,
On Sun, Nov 28, 2021 at 12:42 PM Angus Ainslie <an...@akkea.ca> wrote:

[1]
diff --git a/arch/arm/dts/imx8mq-librem5.dts
b/arch/arm/dts/imx8mq-librem5.dts
index b28420654f..b60a8538af 100644
--- a/arch/arm/dts/imx8mq-librem5.dts
+++ b/arch/arm/dts/imx8mq-librem5.dts
@@ -56,29 +56,29 @@
  &iomuxc {
         pinctrl_hog1: hoggrp1 {

I suspect the hog groups are not getting initialized.

Please try:

&iomuxc {
     pinctrl-names = "default";
     pinctrl-0 = <&pinctrl_hog>;

     pinctrl_hog: hoggrp {
     fsl,pins = <
     ......
    >;
};

and then group all the hog pins under the same group.

Then check IOMUXC_SW_MUX_CTL_PAD to make sure the SION bit is set.

I decided to bypass the devicetree to test it on the imx8mq

static const iomux_v3_cfg_t configure_pads[] = {
          IMX8MQ_PAD_GPIO1_IO03__GPIO1_IO3 | MUX_PAD_CTRL(PAD_CTL_DSE6) 
| MUX_MODE_SION,
          IMX8MQ_PAD_GPIO1_IO14__GPIO1_IO14 | MUX_PAD_CTRL(PAD_CTL_DSE6) 
| MUX_MODE_SION,
          IMX8MQ_PAD_ENET_MDC__GPIO1_IO16 | MUX_PAD_CTRL(PAD_CTL_PUE) | 
MUX_MODE_SION,
          IMX8MQ_PAD_ENET_MDIO__GPIO1_IO17 | MUX_PAD_CTRL(PAD_CTL_PUE) | 
MUX_MODE_SION,
};

static inline void init_pinmux(void)
{
        imx_iomux_v3_setup_multiple_pads(configure_pads, 
ARRAY_SIZE(configure_pads));
}

And this works so I need to figure out what is wrong with my devicetree 
configuration.

Thanks
Angus