This add the initial support of the broadcom bcm6753 SoC family.
Signed-off-by: Philippe Reynes <philippe.rey...@softathome.com>
---
arch/arm/Kconfig | 7 ++
arch/arm/dts/bcm6753.dtsi | 201 ++++++++++++++++++++++++++++++++++++++
2 files changed, 208 insertions(+)
create mode 100644 arch/arm/dts/bcm6753.dtsi
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8053394389..07a1b713cb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -617,6 +617,13 @@ config ARCH_BCM63158
select OF_CONTROL
imply CMD_DM
+config ARCH_BCM6753
+ bool "Broadcom BCM6753 family"
+ select CPU_V7A
+ select DM
+ select OF_CONTROL
+ imply CMD_DM
+
config ARCH_BCM68360
bool "Broadcom BCM68360 family"
select DM
diff --git a/arch/arm/dts/bcm6753.dtsi b/arch/arm/dts/bcm6753.dtsi
new file mode 100644
index 0000000000..bcbb8e17da
--- /dev/null
+++ b/arch/arm/dts/bcm6753.dtsi
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Philippe Reynes <philippe.rey...@softathome.com>
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm6753";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ u-boot,dm-pre-reloc;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0x0>;
+ next-level-cache = <&l2>;
+ u-boot,dm-pre-reloc;
+ };
+
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0x1>;
+ next-level-cache = <&l2>;
+ u-boot,dm-pre-reloc;
+ };
+
+ cpu2: cpu@2 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0x2>;
+ next-level-cache = <&l2>;
+ u-boot,dm-pre-reloc;
+ };
+
+ l2: l2-cache0 {
+ compatible = "cache";
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ u-boot,dm-pre-reloc;
+
+ periph_osc: periph-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_osc>;
+ clock-mult = <2>;
+ clock-div = <1>;
+ };
+
+ refclk50mhz: refclk50mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+ };
+
+ ubus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ uart0: serial@ff812000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0xff812000 0x1000>;
+ clock = <50000000>;
+
+ status = "disabled";
+ };
+
+ wdt1: watchdog@ff800480 {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0xff800480 0x14>;
+ clocks = <&refclk50mhz>;
+ };
+
+ wdt2: watchdog@ff8004c0 {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0xff8004c0 0x14>;
+ clocks = <&refclk50mhz>;
+ };
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdt1>;
+ };
+
+ gpio0: gpio-controller@0xff800500 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xff800500 0x4>,
+ <0xff800520 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio1: gpio-controller@0xff800504 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xff800504 0x4>,
+ <0xff800524 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio2: gpio-controller@0xff800508 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xff800508 0x4>,
+ <0xff800528 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio3: gpio-controller@0xff80050c {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xff80050c 0x4>,
+ <0xff80052c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio4: gpio-controller@0xff800510 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xff800510 0x4>,
+ <0xff800530 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio5: gpio-controller@0xff800514 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xff800514 0x4>,
+ <0xff800534 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio6: gpio-controller@0xff800518 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xff800518 0x4>,
+ <0xff800538 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio7: gpio-controller@0xff80051c {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xff80051c 0x4>,
+ <0xff80053c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ nand: nand-controller@ff801800 {
+ compatible = "brcm,nand-bcm6753",
+ "brcm,brcmnand-v5.0",
+ "brcm,brcmnand";
+ reg-names = "nand", "nand-int-base", "nand-cache";
+ reg = <0xff801800 0x180>,
+ <0xff802000 0x10>,
+ <0xff801c00 0x200>;
+ parameter-page-big-endian = <0>;
+
+ status = "disabled";
+ };
+ };
+};
--
2.17.1
