Re: [PATCH 1/2] mmc: fsl_esdhc_imx: Fix fsl_esdhc_wait_dat0

[Stefano Babic]

Hi Fabio,

On 19.02.22 14:27, Fabio Estevam wrote:
Hi Stefano,
On Sat, Feb 19, 2022 at 10:08 AM <sba...@denx.de> wrote:

According to Haibo Chen [1] - the current implementation mmc_wait_dat0,
the second mmc_wait_dat0() in mmc_switch_voltage() always return timeout.
This causes UHS cards to not properly initialize to their highest rate,
and default back for high-speed mode.
When reviewing [1] and comparing it to the linux driver, it appears
that this function can be accomplished by turning off the clock,
and waiting for the clock-standby bit to become active.
[1] - https://lists.denx.de/pipermail/u-boot/2021-January/438644.html
Reported-by: Tim Harvey <thar...@gateworks.com>
Signed-off-by: Adam Ford <aford...@gmail.com>
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 4c06361bee..e5814232a2 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1684,9 +1684,15 @@ static int fsl_esdhc_wait_dat0(struct udevice *dev, int 
state,
       struct fsl_esdhc_priv *priv = dev_get_priv(dev);
       struct fsl_esdhc *regs = priv->esdhc_regs;

+     /*
+      * Clear the clock-enable and wait for the bit indicating it
+      * is in standby.
+      */
+     esdhc_clrbits32(&regs->vendorspec, VENDORSPEC_CKEN);
       ret = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp,
-                             !!(tmp & PRSSTAT_DAT0) == !!state,
+                             (tmp & PRSSTAT_SDSTB),
                               timeout_us);
+
       return ret;
  }

Applied to u-boot-imx, master, thanks !

Bough said this patch is incorrect during the review.

Ouch, I have seen it was tested, I missed Bough's comment. I revert it 
and I ask Tom to wait - and nevertheless, I delegate these to Peng, this 
is his area of competence.

Best regards,
Stefano

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