This converts the following to Kconfig:
CONFIG_BOARD_ECC_SUPPORT
Signed-off-by: Tom Rini <[email protected]>
---
arch/arm/mach-mvebu/Kconfig | 5 +++++
include/configs/db-mv784mp-gp.h | 1 -
include/configs/maxbcm.h | 1 -
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 7d487f270b51..e17a55a44261 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -152,6 +152,7 @@ config TARGET_OCTEONTX2_CN913x
config TARGET_DB_MV784MP_GP
bool "Support db-mv784mp-gp"
+ select BOARD_ECC_SUPPORT
select MV78460
config TARGET_DS414
@@ -160,6 +161,7 @@ config TARGET_DS414
config TARGET_MAXBCM
bool "Support maxbcm"
+ select BOARD_ECC_SUPPORT
select MV78460
config TARGET_THEADORABLE
@@ -226,6 +228,9 @@ config DDR_RESET_ON_TRAINING_FAILURE
device will still hang - it doesn't make sense to reset the board
in such a case.
+config BOARD_ECC_SUPPORT
+ bool
+
config SYS_BOARD
default "clearfog" if TARGET_CLEARFOG
default "helios4" if TARGET_HELIOS4
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index 7baae3b090d8..41d469d79526 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -72,6 +72,5 @@
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_SPD_EEPROM 0x4e
-#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
#endif /* _CONFIG_DB_MV7846MP_GP_H */
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index 073c5a57b2c9..e4df9d8dfff3 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -64,6 +64,5 @@
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_SYS_SDRAM_SIZE SZ_1G
-#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
#endif /* _CONFIG_DB_MV7846MP_GP_H */
--
2.25.1
