On Fri, 28 Jan 2022 at 15:43, Alper Nebi Yasak <[email protected]> wrote: > > The Rockchip RK3399 eMMC PHY has to be power-cycled while changing its > clock speed to some higher speeds. This is dependent on the desired > SDHCI clock speed, and it looks like the PHY should be powered off while > setting the SDHCI clock in these cases. > > Commit ac804143cfd1 ("mmc: rockchip_sdhci: add phy and clock config for > rk3399") attempts to do this in the set_ios_post() hook by setting the > SDHCI clock once more while the PHY is turned off/on as necessary, as > the SDHCI framework does not provide a way to override how it sets its > clock. However, the commit breaks reinitializing the eMMC on a few > boards including chromebook_kevin and reportedly ROCKPro64. > > This patch reworks the power cycling to utilize the SDHCI framework > slightly better (using the set_control_reg() hook to power off the PHY > and set_ios_post() hook to power it back on) which happens to fix the > issue, at least on a chromebook_kevin. > > Signed-off-by: Alper Nebi Yasak <[email protected]> > --- > RK3568 parts only build-tested as I don't have a RK3568 board. > > Changes in v4: > - Add comment for Rockchip SDHCI set_control_reg() driver data op > - Add comment for Rockchip SDHCI set_ios_post() driver data op > > Changes in v2: > - Add this patch > > drivers/mmc/rockchip_sdhci.c | 76 +++++++++++++++++++++++++++++++----- > 1 file changed, 66 insertions(+), 10 deletions(-)
Reviewed-by: Simon Glass <[email protected]>
