Am Mi., 9. März 2022 um 21:43 Uhr schrieb Hari Nagalla <hnaga...@ti.com>:
>
> On AM64x devices, it is possible to route Main ESM0 error events to MCU
> ESM. MCU ESM high error output can trigger the reset logic to reset the
> device. So, for these devices we expect two ESM device nodes in the
> device tree, one for Main ESM and the another MCU ESM in the device tree.
> When these ESM device nodes are properly configired it is possible to
> route the Main RTI0 WWDT output to the MCU ESM high output through Main
> ESM and trigger a device reset when
> CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'.
>
> On K3 AM64x devices, the R5 SPL u-boot handles the ESM device node
> configurations.
>
> Signed-off-by: Hari Nagalla <hnaga...@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
> ---
> arch/arm/mach-k3/am642_init.c | 40 +++++++++++++++++++++++++++++++----
> 1 file changed, 36 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
> index 543dea02bc..3a75dcea35 100644
> --- a/arch/arm/mach-k3/am642_init.c
> +++ b/arch/arm/mach-k3/am642_init.c
> @@ -24,12 +24,22 @@
> #include <dm/root.h>
>
> #if defined(CONFIG_SPL_BUILD)
> +#define MCU_CTRL_MMR0_BASE 0x04500000
> +#define CTRLMMR_MCU_RST_CTRL 0x04518170
>
> static void ctrl_mmr_unlock(void)
> {
> /* Unlock all PADCFG_MMR1 module registers */
> mmr_unlock(PADCFG_MMR1_BASE, 1);
>
> + /* Unlock all MCU_CTRL_MMR0 module registers */
> + mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
> + mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
> + mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
> + mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
> + mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
> + mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
> +
> /* Unlock all CTRL_MMR0 module registers */
> mmr_unlock(CTRL_MMR0_BASE, 0);
> mmr_unlock(CTRL_MMR0_BASE, 1);
> @@ -37,9 +47,6 @@ static void ctrl_mmr_unlock(void)
> mmr_unlock(CTRL_MMR0_BASE, 3);
> mmr_unlock(CTRL_MMR0_BASE, 5);
> mmr_unlock(CTRL_MMR0_BASE, 6);
> -
> - /* Unlock all MCU_PADCFG_MMR1 module registers */
> - mmr_unlock(MCU_PADCFG_MMR1_BASE, 1);
> }
>
> /*
> @@ -142,9 +149,20 @@ int fdtdec_board_setup(const void *fdt_blob)
> }
> #endif
>
> +#if defined(CONFIG_ESM_K3)
> +static void enable_mcu_esm_reset(void)
> +{
> + /* Set CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RST_EN_Z to '0' (low
> active) */
> + u32 stat = readl(CTRLMMR_MCU_RST_CTRL);
> +
> + stat &= 0xFFFDFFFF;
> + writel(stat, CTRLMMR_MCU_RST_CTRL);
> +}
> +#endif
> +
> void board_init_f(ulong dummy)
> {
> -#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS)
> +#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) ||
> defined(CONFIG_ESM_K3)
> struct udevice *dev;
> int ret;
> #endif
> @@ -194,6 +212,20 @@ void board_init_f(ulong dummy)
> /* Output System Firmware version info */
> k3_sysfw_print_ver();
>
> +#if defined(CONFIG_ESM_K3)
> + /* Probe/configure ESM0 */
> + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev);
> + if (ret)
> + printf("esm main init failed: %d\n", ret);
> +
> + /* Probe/configure MCUESM */
> + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4100000", &dev);
> + if (ret)
> + printf("esm mcu init failed: %d\n", ret);
> +
> + enable_mcu_esm_reset();
> +#endif
> +
> #if defined(CONFIG_K3_AM64_DDRSS)
> ret = uclass_get_device(UCLASS_RAM, 0, &dev);
> if (ret)
> --
> 2.17.1
>
--
greets
--
Christian Gmeiner, MSc
https://christian-gmeiner.info/privacypolicy
