Hi Pierre-Clément,

Thanks for your correction, there was wrong mask here.
Reviewed-by: David Wu <david...@rock-chips.com>

在 2022/4/6 23:08, Kever Yang 写道:
Add David,

Hi David,

     Could you help to check this patch?


Thanks,
- Kever
On 2022/3/16 23:39, Pierre-Clément Tosi wrote:
Swap the arguments as that seems to have been the author's intention.

Note: This fix wasn't tested on hardware and will result in more bits
       being set by the underlying writel() in rk_clrsetreg(), which
       might bring unexpected behavioural changes.

Fixes: b07911840025 ("net: gmac_rockchip: add support for px30")
Signed-off-by: Pierre-Clément Tosi <pt...@google.com>
Cc: Joe Hershberger <joe.hershber...@ni.com>
Cc: Heiko Stuebner <he...@sntech.de>
Cc: Kever Yang <kever.y...@rock-chips.com>
Cc: Tom Rini <tr...@konsulko.com>
---
  drivers/net/gmac_rockchip.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 04008d2b19..0ecbcdf641 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -350,7 +350,7 @@ static void px30_gmac_set_to_rmii(struct gmac_rockchip_plat *pdata)
      struct px30_grf *grf;
      enum {
          PX30_GMAC_PHY_INTF_SEL_SHIFT = 4,
-        PX30_GMAC_PHY_INTF_SEL_MASK  = GENMASK(4, 6),
+        PX30_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
          PX30_GMAC_PHY_INTF_SEL_RMII  = BIT(6),
      };

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