On 13.04.22 00:41, Marek Vasut wrote:
Enable instruction cache early on to speed up the boot process on i.MX8M.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
---
V2: Protect the icache_enable with !CONFIG_IS_ENABLED(SYS_ICACHE_OFF),
the symbol might be undefined in case CONFIG_(SPL_)SYS_ICACHE_OFF
is set
---
arch/arm/mach-imx/imx8m/soc.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index bb94ef51492..8171631db10 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -550,6 +550,11 @@ EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock);
int arch_cpu_init(void)
{
struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+ icache_enable();
+#endif
+
/*
* ROM might disable clock for SCTR,
* enable the clock before timer_init.
Thanks for fast fix - I apply this before my PR.
Regards,
Stefano
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