On Wed, Jun 08, 2022 at 04:21:36PM -0500, [email protected] wrote: > From: Nick Hawkins <[email protected]> > > The GXP supports 3 separate SPI interfaces to accommodate the system > flash, core flash, and other functions. The SPI engine supports variable > clock frequency, selectable 3-byte or 4-byte addressing and a > configurable x1, x2, and x4 command/address/data modes. The memory > buffer for reading and writing ranges between 256 bytes and 8KB. This > driver supports access to the core flash. > > Signed-off-by: Nick Hawkins <[email protected]>
Applied to u-boot/next, thanks! -- Tom
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