Hi Tom,
please pull the following patches to your tree. CI loop doesn't show any
problem.
Thanks,
Michal
The following changes since commit 6e15cda270a060cf87c6c643a1cc3da65ffb242d:
Prepare v2022.10-rc1 (2022-07-25 20:31:12 -0400)
are available in the Git repository at:
g...@source.denx.de:u-boot/custodians/u-boot-microblaze.git
tags/xilinx-for-v2022.10-rc2
for you to fetch changes up to 2a75bc1303b34e88745fcecfeacbe94f2a4bd1e2:
spi: zynq_qspi: Fix programming qspi speed (2022-07-26 09:34:21 +0200)
----------------------------------------------------------------
Xilinx changes for v2022.10-rc2
fpga:
- Convert SYS_FPGA_CHECK_CTRLC and SYS_FPGA_PROG_FEEDBACK to Kconfig
- Add support for secure bitstream loading
spi:
- xilinx_spi: Add support for memopers and supports_op
- zynq_qspi: Add support for supports_op/child_pre_probe
- zynq_qspi: Fix dummy cycle and qspi speed calculations
xilinx:
- Get rid of #stream-id-cells
- Use fixed partitions for SOM
- Add support for UUID reading from FRU
- Use strlcpy instead of strncpy
- Add reset driver support for ZynqMP and Versal
- Enable power domain driver in ZynqMP and Versal
zynqmp:
- Do no place BSS at 0 which have issue with NULL pointer
- Enable SLG gpio driver
- Disable LMB for mini configurations
- Remove duplicate PMIO_NODE_ID_BASE macro
versal:
- Add xlnx-versal-resets.h header
mmc:
- zynq_sdhci: Fix macro for MMC HS
relocate-rela:
- Fix support for BE hosts
- Define all macros for e_machine and reloc types
misc:
- Get rid of guard macros from ARM and RISC-V
lmb:
- Add support for disabling LMB
serial:
- zynq: Fix baudrate calculation
tests:
- Mark bind tests to run only on sandbox
- List also dm uclass and devres
----------------------------------------------------------------
Adrian Fiergolski (1):
fpga: zynqmp: support loading encrypted bitfiles
Alexander Dahl (2):
fpga: Convert SYS_FPGA_CHECK_CTRLC to Kconfig
fpga: Convert SYS_FPGA_PROG_FEEDBACK to Kconfig
Ashok Reddy Soma (11):
mmc: zynq_sdhci: Fix timing macros for MMC High speed
lmb: Fix lmb property's defination under struct lmb
zynqmp: Run board_get_usable_ram_top() only on main U-Boot
arm64: zynqmp: Enable reset driver
firmware: zynqmp: Change prototype of zynqmp_pmufw_load_config_object()
firmware: zynqmp: Load config overlay for core0 to pmufw
arm64: zynqmp: Enable power domain driver
mailbox: zynqmp: Move struct zynqmp_ipi_msg from sys_proto.h
arm64: versal: Enable power domain driver and its dependencies
spi: zynq_qspi: Add support for zynq_qspi_mem_exec_op
spi: zynq_qspi: Fix programming qspi speed
Ayan Kumar Halder (1):
xilinx: Remove the legacy property "#stream-id-cells"
Kunihiko Hayashi (1):
serial: zynq: Use DIV_ROUND_CLOSEST() to calcurate divider value
Michal Simek (13):
arm64: zynqmp: Used fixed-partitions for QSPI in k26
arm64: zynqmp: Enable SLG gpo driver by default
arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED
arm64: zynqmp: Disable LMB for mini configurations
py: tests: Bind should run only on sandbox
test/py: Run simple dm commands without checking
xilinx: Remove duplicate PMIO_NODE_ID_BASE macro
dt-bindings: versal: Add versal reset IDs
tools: relocate-rela: Remove guard around R_AARCH64_RELATIVE
tools: relocate-rela: Define all macros for e_machine and reloc types
xilinx: Wire uuid reading from FRU
xilinx: common: Use strlcpy instead of strncpy
arm64: versal: Enable reset driver for versal
Oleksandr Suvorov (12):
fpga: add option for loading FPGA secure bitstreams
fpga: xilinx: add missed identifier names
fpga: xilinx: add bitstream flags to driver desc
fpga: zynqmp: add str2flags call
fpga: xilinx: pass compatible flags to xilinx_load()
fpga: pass compatible flags to fpga_load()
fpga: add fpga_compatible2flag
spl: fit: pass real compatible flags to fpga_load()
fpga: xilinx: pass compatible flags to load() callback
fpga: zynqmp: reduce zynqmppl_load() code
fpga: zynqmp: add bitstream compatible checking
fpga: zynqmp: support loading authenticated images
Samuel Holland (1):
tools: relocate-rela: Fix ELF decoding on big-endian hosts
Siva Durga Prasad Paladugu (1):
spi: zynq_qspi: Add child pre probe function
Stefan Herbrechtsmeier (1):
xilinx: zynqmp: Do not use 0 as spl bss start address
T Karthik Reddy (4):
reset: zynqmp: Add reset driver support for versal
spi: xilinx_spi: Add support for spi memory operations
spi: xilinx_spi: Add support ops to axi qspi driver
spi: zynq_qspi: Use dummy buswidth in dummy byte calculation
README | 7 -
arch/arc/lib/bootm.c | 8 +-
arch/arm/dts/versal-mini-emmc0.dts | 1 -
arch/arm/dts/versal-mini-emmc1.dts | 1 -
arch/arm/dts/zynqmp-sm-k26-revA.dts | 163
+++++++-------
arch/arm/dts/zynqmp.dtsi | 28 ---
arch/arm/lib/bootm.c | 4 +-
arch/arm/mach-zynq/cpu.c | 1 +
arch/arm/mach-zynqmp/include/mach/sys_proto.h | 5 -
arch/m68k/lib/bootm.c | 8 +-
arch/microblaze/lib/bootm.c | 2 +-
arch/powerpc/lib/bootm.c | 8 +-
arch/riscv/lib/bootm.c | 4 +-
arch/x86/lib/bootm.c | 5 +-
board/xilinx/common/board.c | 26 ++-
board/xilinx/versal/board.c | 5 +-
board/xilinx/zynqmp/zynqmp.c | 8 +-
boot/Kconfig | 4 +-
boot/image-board.c | 8 +-
cmd/Kconfig | 3 +-
cmd/fpga.c | 8 +-
common/spl/Kconfig | 3 +-
common/spl/spl_fit.c | 17 +-
configs/astro_mcf5373l_defconfig | 1 +
configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 2 -
configs/xilinx_versal_virt_defconfig | 4 +
configs/xilinx_zynqmp_mini_defconfig | 1 +
configs/xilinx_zynqmp_mini_emmc0_defconfig | 3 +-
configs/xilinx_zynqmp_mini_emmc1_defconfig | 3 +-
configs/xilinx_zynqmp_mini_qspi_defconfig | 3 +-
configs/xilinx_zynqmp_virt_defconfig | 7 +-
doc/uImage.FIT/source_file_format.txt | 7 +-
drivers/firmware/firmware-zynqmp.c | 24 +-
drivers/fpga/Kconfig | 27 +++
drivers/fpga/fpga.c | 33 ++-
drivers/fpga/spartan2.c | 3 +-
drivers/fpga/spartan3.c | 2 +-
drivers/fpga/versalpl.c | 2 +-
drivers/fpga/virtex2.c | 13 +-
drivers/fpga/xilinx.c | 8 +-
drivers/fpga/zynqmppl.c | 99 ++++++--
drivers/fpga/zynqpl.c | 2 +-
drivers/mailbox/Kconfig | 2 +-
drivers/mailbox/zynqmp-ipi.c | 2 +-
drivers/mmc/zynq_sdhci.c | 4 +-
drivers/reset/Kconfig | 6 +-
drivers/reset/reset-zynqmp.c | 10 +-
drivers/serial/serial_zynq.c | 2 +-
drivers/spi/xilinx_spi.c | 236
+++++++++++++-------
drivers/spi/zynq_qspi.c | 73 +++++-
include/configs/astro_mcf5373l.h | 1 -
include/dt-bindings/reset/xlnx-versal-resets.h | 105 +++++++++
include/fpga.h | 4 +-
include/lmb.h | 2 +-
include/versalpl.h | 3 -
include/xilinx.h | 21 +-
include/zynqmp_firmware.h | 9 +-
include/zynqmppl.h | 9 +-
lib/lmb.c | 2 +-
scripts/config_whitelist.txt | 1 -
test/py/tests/test_bind.py | 3 +-
test/py/tests/test_dm.py | 8 +
tools/relocate-rela.c | 151
++++++++-----
63 files changed, 836 insertions(+), 389 deletions(-)
create mode 100644 include/dt-bindings/reset/xlnx-versal-resets.h
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
