Re: [PATCH v2 1/3] arm: bcmbca: add bcm6856 SoC support under CONFIG_ARCH_BCMBCA

Philippe REYNES Wed, 24 Aug 2022 05:23:39 -0700

Hi William,


Le 15/08/2022 à 20:55, William Zhang a écrit :

BCM6856 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other Broadband
SoC, this patch adds it under CONFIG_BCM6856 chip config and
CONFIG_ARCH_BCMBCA platform config.

This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and Broadcom uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.

The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.

Signed-off-by: William Zhang <william.zh...@broadcom.com>



Reviewed-by: Philippe Reynes <philippe.rey...@softathome.com>

---

(no changes since v1)

  MAINTAINERS                              |   1 +
  arch/arm/dts/Makefile                    |   2 +
  arch/arm/dts/bcm6856.dtsi                | 103 +++++++++++++++++++++++
  arch/arm/dts/bcm96856.dts                |  30 +++++++
  arch/arm/mach-bcmbca/Kconfig             |   8 ++
  arch/arm/mach-bcmbca/Makefile            |   1 +
  arch/arm/mach-bcmbca/bcm6856/Kconfig     |  17 ++++
  arch/arm/mach-bcmbca/bcm6856/Makefile    |   5 ++
  arch/arm/mach-bcmbca/bcm6856/mmu_table.c |  32 +++++++
  board/broadcom/bcmbca/Kconfig            |   7 ++
  configs/bcm96856_defconfig               |  23 +++++
  include/configs/bcm96856.h               |  11 +++
  12 files changed, 240 insertions(+)
  create mode 100644 arch/arm/dts/bcm6856.dtsi
  create mode 100644 arch/arm/dts/bcm96856.dts
  create mode 100644 arch/arm/mach-bcmbca/bcm6856/Kconfig
  create mode 100644 arch/arm/mach-bcmbca/bcm6856/Makefile
  create mode 100644 arch/arm/mach-bcmbca/bcm6856/mmu_table.c
  create mode 100644 configs/bcm96856_defconfig
  create mode 100644 include/configs/bcm96856.h

diff --git a/MAINTAINERS b/MAINTAINERS
index d0a5b2352cc8..1f50dad583ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -230,6 +230,7 @@ N:  bcm[9]?63178
  N:    bcm[9]?6756
  N:    bcm[9]?6813
  N:    bcm[9]?6846
+N:     bcm[9]?6856
  N:    bcm[9]?6878

ARM BROADCOM BCMSTB

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c55bc3569662..a32bdf8c9f17 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1182,6 +1182,8 @@ dtb-$(CONFIG_BCM6813) += \
        bcm96813.dtb
  dtb-$(CONFIG_BCM6846) += \
        bcm96846.dtb
+dtb-$(CONFIG_BCM6856) += \
+       bcm96856.dtb
  dtb-$(CONFIG_BCM6878) += \
        bcm96878.dtb

diff --git a/arch/arm/dts/bcm6856.dtsi b/arch/arm/dts/bcm6856.dtsi

new file mode 100644
index 000000000000..0bce6497219f
--- /dev/null
+++ b/arch/arm/dts/bcm6856.dtsi
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+       compatible = "brcm,bcm6856", "brcm,bcmbca";
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       interrupt-parent = <&gic>;
+
+       cpus {
+               #address-cells = <2>;
+               #size-cells = <0>;
+
+               B53_0: cpu@0 {
+                       compatible = "brcm,brahma-b53";
+                       device_type = "cpu";
+                       reg = <0x0 0x0>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               B53_1: cpu@1 {
+                       compatible = "brcm,brahma-b53";
+                       device_type = "cpu";
+                       reg = <0x0 0x1>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               L2_0: l2-cache0 {
+                       compatible = "cache";
+               };
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | 
IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | 
IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | 
IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | 
IRQ_TYPE_LEVEL_LOW)>;
+       };
+
+       pmu: pmu {
+               compatible = "arm,cortex-a53-pmu";
+               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                       <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&B53_0>, <&B53_1>;
+       };
+
+       clocks: clocks {
+               periph_clk:periph-clk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
+       };
+
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
+       axi@81000000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x0 0x81000000 0x8000>;
+
+               gic: interrupt-controller@1000 {
+                       compatible = "arm,gic-400";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x1000 0x1000>, /* GICD */
+                               <0x2000 0x2000>, /* GICC */
+                               <0x4000 0x2000>, /* GICH */
+                               <0x6000 0x2000>; /* GICV */
+                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+                                       IRQ_TYPE_LEVEL_HIGH)>;
+               };
+       };
+
+       bus@ff800000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x0 0xff800000 0x800000>;
+
+               uart0: serial@640 {
+                       compatible = "brcm,bcm6345-uart";
+                       reg = <0x640 0x18>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&periph_clk>;
+                       clock-names = "refclk";
+                       status = "disabled";
+               };
+       };
+};
diff --git a/arch/arm/dts/bcm96856.dts b/arch/arm/dts/bcm96856.dts
new file mode 100644
index 000000000000..032aeb75c983
--- /dev/null
+++ b/arch/arm/dts/bcm96856.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6856.dtsi"
+
+/ {
+       model = "Broadcom BCM96856 Reference Board";
+       compatible = "brcm,bcm96856", "brcm,bcm6856", "brcm,bcmbca";
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x0 0x0 0x08000000>;
+       };
+};
+
+&uart0 {
+       status = "okay";
+};
diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index d78618820b58..5dd566a98d32 100644
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -83,6 +83,13 @@ config BCM6846
        select DM_SERIAL
        select BCM6345_SERIAL

+config BCM6856

+       bool "Support for Broadcom 6856 Family"
+       select ARM64
+       select SYS_ARCH_TIMER
+       select DM_SERIAL
+       select BCM6345_SERIAL
+
  config BCM6878
        bool "Support for Broadcom 6878 Family"
        select SYS_ARCH_TIMER
@@ -101,6 +108,7 @@ source "arch/arm/mach-bcmbca/bcm63178/Kconfig"
  source "arch/arm/mach-bcmbca/bcm6756/Kconfig"
  source "arch/arm/mach-bcmbca/bcm6813/Kconfig"
  source "arch/arm/mach-bcmbca/bcm6846/Kconfig"
+source "arch/arm/mach-bcmbca/bcm6856/Kconfig"
  source "arch/arm/mach-bcmbca/bcm6878/Kconfig"

endif

diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index e5df60e7648b..20f827512005 100644
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -14,4 +14,5 @@ obj-$(CONFIG_BCM63178) += bcm63178/
  obj-$(CONFIG_BCM6756) += bcm6756/
  obj-$(CONFIG_BCM6813) += bcm6813/
  obj-$(CONFIG_BCM6846) += bcm6846/
+obj-$(CONFIG_BCM6856) += bcm6856/
  obj-$(CONFIG_BCM6878) += bcm6878/
diff --git a/arch/arm/mach-bcmbca/bcm6856/Kconfig 
b/arch/arm/mach-bcmbca/bcm6856/Kconfig
new file mode 100644
index 000000000000..6ac75cb84095
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6856/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM6856
+
+config TARGET_BCM96856
+       bool "Broadcom 6856 Reference Board"
+       depends on ARCH_BCMBCA
+
+config SYS_SOC
+       default "bcm6856"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif
diff --git a/arch/arm/mach-bcmbca/bcm6856/Makefile 
b/arch/arm/mach-bcmbca/bcm6856/Makefile
new file mode 100644
index 000000000000..62624977034b
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6856/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj-y += mmu_table.o
diff --git a/arch/arm/mach-bcmbca/bcm6856/mmu_table.c 
b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c
new file mode 100644
index 000000000000..8e53b4929eb8
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  Copyright 2022 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <linux/sizes.h>
+
+static struct mm_region bcm96856_mem_map[] = {
+               {
+                               .virt = 0x00000000UL,
+                               .phys = 0x00000000UL,
+                               .size = 1UL * SZ_1G,
+                               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                                               PTE_BLOCK_INNER_SHARE
+               },
+               {
+                               /* SoC peripheral */
+                               .virt = 0xff800000UL,
+                               .phys = 0xff800000UL,
+                               .size = 0x100000,
+                               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                                               PTE_BLOCK_NON_SHARE |
+                                               PTE_BLOCK_PXN | PTE_BLOCK_UXN
+               },
+               {
+                               /* List terminator */
+                               0,
+               }
+};
+
+struct mm_region *mem_map = bcm96856_mem_map;
diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index 13815fd7975f..efe504919a0f 100644
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -86,6 +86,13 @@ config SYS_CONFIG_NAME

endif+if TARGET_BCM96856

+
+config SYS_CONFIG_NAME
+       default "bcm96856"
+
+endif
+
  if TARGET_BCM96878

config SYS_CONFIG_NAME

diff --git a/configs/bcm96856_defconfig b/configs/bcm96856_defconfig
new file mode 100644
index 000000000000..7e1c09769f70
--- /dev/null
+++ b/configs/bcm96856_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM6856=y
+CONFIG_TARGET_BCM96856=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="bcm96856"
+CONFIG_IDENT_STRING=" Broadcom BCM6856"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y
diff --git a/include/configs/bcm96856.h b/include/configs/bcm96856.h
new file mode 100644
index 000000000000..a7ae71eeaafe
--- /dev/null
+++ b/include/configs/bcm96856.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM96856_H
+#define __BCM96856_H
+
+#define CONFIG_SYS_SDRAM_BASE          0x00000000
+
+#endif

Re: [PATCH v2 1/3] arm: bcmbca: add bcm6856 SoC support under CONFIG_ARCH_BCMBCA

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