Move all rk3128 u-boot specific properties in separate dtsi files.
Sort emmc node.

Signed-off-by: Johan Jonker <jbx6...@gmail.com>
---
 arch/arm/dts/rk3128-evb-u-boot.dtsi |  7 +++++++
 arch/arm/dts/rk3128-evb.dts         | 10 +++++-----
 arch/arm/dts/rk3128-u-boot.dtsi     | 27 +++++++++++++++++++++++++++
 arch/arm/dts/rk3128.dtsi            | 11 -----------
 4 files changed, 39 insertions(+), 16 deletions(-)
 create mode 100644 arch/arm/dts/rk3128-evb-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3128-u-boot.dtsi

diff --git a/arch/arm/dts/rk3128-evb-u-boot.dtsi 
b/arch/arm/dts/rk3128-evb-u-boot.dtsi
new file mode 100644
index 00000000..8b16bbe4
--- /dev/null
+++ b/arch/arm/dts/rk3128-evb-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk3128-u-boot.dtsi"
+
+&emmc {
+       u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index a407ac2d..e7d8f7c9 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -37,6 +37,11 @@
        };
 };
 
+&emmc {
+       fifo-mode;
+       status = "okay";
+};
+
 &i2c1 {
        status = "okay";
 
@@ -74,11 +79,6 @@
        status = "okay";
 };
 
-&emmc {
-       fifo-mode;
-       status = "okay";
-};
-
 &pinctrl {
        usb_otg {
                otg_vbus_drv: host-vbus-drv {
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
new file mode 100644
index 00000000..dbb41fe1
--- /dev/null
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rockchip-u-boot.dtsi"
+
+/ {
+       dmc: dmc@20004000 {
+               compatible = "rockchip,rk3128-dmc", "syscon";
+               reg = <0x0 0x20004000 0x0 0x1000>;
+               u-boot,dm-pre-reloc;
+       };
+};
+
+&cru {
+       u-boot,dm-pre-reloc;
+};
+
+&emmc {
+       max-frequency = <150000000>;
+};
+
+&grf {
+       u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+       max-frequency = <150000000>;
+};
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 62fd5343..589818da 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -237,14 +237,7 @@
                clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";
        };
 
-       dmc: dmc@20004000 {
-               u-boot,dm-pre-reloc;
-               compatible = "rockchip,rk3128-dmc", "syscon";
-               reg = <0x0 0x20004000 0x0 0x1000>;
-       };
-
        cru: clock-controller@20000000 {
-               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3128-cru";
                reg = <0x20000000 0x1000>;
                rockchip,grf = <&grf>;
@@ -440,7 +433,6 @@
        sdmmc: dwmmc@10214000 {
                compatible = "rockchip,rk312x-dw-mshc", 
"rockchip,rk3288-dw-mshc";
                reg = <0x10214000 0x4000>;
-               max-frequency = <150000000>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
                         <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
@@ -453,10 +445,8 @@
        };
 
        emmc: dwmmc@1021c000 {
-               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3128-dw-mshc", 
"rockchip,rk3288-dw-mshc";
                reg = <0x1021c000 0x4000>;
-               max-frequency = <150000000>;
                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
                         <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
@@ -538,7 +528,6 @@
        };
 
        grf: syscon@20008000 {
-               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3128-grf", "syscon";
                reg = <0x20008000 0x1000>;
        };
-- 
2.20.1

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